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14 SMT007 MAGAZINE I AUGUST 2018 standoff height. So, really the QFNs are probably the most critical part that we see when it comes to optimizing a wash process. Paco Solis: When it comes down to the cleaning part of it, the hydrodynamics— the flow dynamics—of the cleaning process itself, it's one thing to have a QFN on its own without a lot of high aspect ratio architectures around it. But now, every PCBA is going to be a different, unique architecture and it may have specific requirements that impede flow dynamics. So, you just can't put every board through in the same way. Sometimes, you have to change your orientation, your flow nozzles, or direction, to increase the flow dynamics and contact time. It's a challenging part on its own. But the collateral architecture around it or adjacent to it can also make your issue a bit more difficult just to get chemistry or water at it. Las Marias: Is there still a misconception when it comes to no-clean? Solis: It depends on circuit sensitivity and architecture. And then in defense of the flux suppliers, they don't know how and what design layout engineers and electrical engineers are going to throw at, at their products, so it's really a little difficult sometimes to predict what's necessary for sensitive architectures. Las Marias: One of the issues we always hear when speaking to industry experts is the need for communication between the designers and assemblers. Is the cleaning process another issue that they should be talking about when it comes to discussions on their design and assembly? Camden: There's a term—design for cleanability—that's been out there for a few years now because of some of these same issues. Some thoughts fit in to the final step of cleaning during the design process, but I think it is seen as low-value input when it comes to design, because those who design don't always clean. Design for cleanability is something that's out there, and it should be considered absolutely when you plan on cleaning it, because what you're doing upfront have a negative impact on the cleaning process. Andy Shaughnessy: What are some things that designers should do to make the cleaning process go more smoothly? Solis: There are some architecture layers that you stuck down your trace even. We see some mistakes where layout persons are putting their legends down underneath the QFN. They are doing more and more interconnects; now you have architectures that will start impeding or there are architectures where packages are touching directly. I have some cross- section areas that show these QFNs staying at 6 microns away from the solder mask area. Basically, the core of the part is cordoned off by these architectures, so the layout engineers need to understand what the challenges are for Paco Solis, Foresite Inc.

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