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30 SMT007 MAGAZINE I AUGUST 2018 3. Coupons are processed in a wave solder system in both comb up (preheat without solder wave contact on the combs) and comb down (preheat and solder wave contact) orientations 4. Applied bias and exposure to accelerating fixed temperature and humidity environments 5. Quantified pass/fail minimum resistance criteria 6. Qualitative pass/fail inspection require- ments after environmental conditioning Localized Extraction and Cleanliness Testing The commercially available cleanliness test system utilized in this study uses a novel localized extraction method to isolate the flux under test from a surface where flux has been applied. This system applies steam generated from deionized water and vacuum to extract a solution of flux residue and water. The steam head contains an integral PCB coupon that is immersed in the extracted solution. A bias is applied across a set of non-connected PCB lands and current across these lands is measured. The time for the current to reach a critical value called a "current leakage event" is measured. The system reports a clean result if the current remains below the critical value for a minimum specified time; otherwise, the test system reports a DIRTY result. Test Methods SIR Testing According to IPC J-STD-004B (Requirements for Soldering Fluxes) IPC J-STD-004B provides SIR test requirements for manufacturers of no-clean fluxes. This standard refers to IPC TM-650- (Surface Insulation Resistance) for the specific conditions for performing this testing, requires a test duration of 7 days, and refers to IPC TM-650 (Surface Insulation Resistance, Fluxes) for preparation of the test coupons. The above referenced test methods call for a number of conditions that are to be followed when performing SIR testing. The IPC B-24 test coupon is specified, with four comb patterns per coupon. Each individual comb pattern is unpreserved bare copper, with 0.4 mm width lines and 0.5 mm spacing between comb traces. The test coupons used in this study are a modi- fied version of the B-24 coupon that maintain the key characteristics on a slightly different form factor PCB (Figure 1). The test conditions are specified as 40 ± 2°C and 90 ± 3% relative humidity. During the seven-day environmental conditioning expo- sure, a direct current bias of 25 ± 1 V/mm between adjacent parallel traces of the comb patterns is applied. This is equivalent to 12.5 ± 0.5 V on the B-24 coupon, having 0.5 mm comb spacing. The key qualitative output of J-STD-004B SIR testing is the measurement of the resis- tance between adjacent comb patterns. These SIR measurements are taken at a maximum interval of 20 minutes over the environmental conditioning test duration. The criteria for passing the SIR test are: 1. All SIR measurements between adjacent combs is no less than 100 MΩ (log SIR > 8) between hours 24 and 168 of the conditioning duration 2. There shall be no evidence of electro- chemical migration that reduces conductor spacing by more than 20% 3. There shall not be corrosion of comb conductors Figure 1: Modified B-24 test coupon.

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