Issue link: https://iconnect007.uberflip.com/i/1011746
AUGUST 2018 I PCB007 MAGAZINE 39 tant steps in the PCB manufacturing process like basic laminates, drill bit design, lamina- tion temperature cycles, drill hit count, copper plate chemistry, etchback process, hole filling materials and ENIG process control. This testing technique has led to the discov- ery of PTH barrel and corner cracks as well as microvia cracks. The efficient and inexpen- sive CITC test vehicle (TV) was used to moni- tor and continually improve the microvia pro- cess including the use of high-stress stacked microvias. Kevin utilized many graphs and di- agrams illustrating how to create and prevent microvia failures from field studies and design alternatives, which led to his final slide: "Con- clusion: Reflow is the cause of assembly and field via failures." The fourth presentation was by Jimmy Baccam of Lockheed titled "Micro - via Reliability." Jimmy is a product designer and de- signed the microvia boards that failed. This is his story: "Microvias are not bul- letproof and there are few design rules that have been verified and are consistent from ven- dor to vendor. Further industry studies are re- quired to understand what makes a robust mi- crovia. There are many complex variables in designing with micr ovias, but this I have found: • It is hard to pinpoint any one thing as the perpetrator of microvia failure – Is it laser drilling? – Is it materials? – Is it chemistry? – Is the target pad surface cleanliness? – Is it something else or all the above and more? • Microvias that have passed electrical test after fabrication can still fail post assembly • Microcracks at the target pad and electroless copper interface are observed in failing microvias • A more robust screening method that mea- sures resistance during reflow is required to verify microvia reliability in a PCB • Depending on the function of the circuit, a microcrack in the microvia doesn't neces- sarily mean the circuit will fail. Sensitive analog signals of less than 5 mA of current had performance failures, while the digi- tal signals on the same board which had greater than 5 mA of current didn't have any performance problems even though the microcracks were present" Lockheed did extensive testing to discover where the microvias had failed. SEMs and fo- cused-ion-beam (FIB) helped locate the mi- crocracks in microvias. To test for these failure modes , a new IPC-2221 D-coupon has been de- signed by Lockheed containing two daisy-chained microvias with/without buried through-via struc- tures. These coupons then are reflowed a mini- mum of 6X times using one of two different re- flow profiles (230°C or 260°C) and monitored with a 4-wir e resistance sensor. The results from OM testing indicate that the coupon and test pro - cedure does in fact find the weak microvia struc- tures and those that pass are good to assemble. Lockheed will be doing more experiments on large fabrication 12-layer panels during 2018 and 2019 using this new D-coupon (but modified into six different sets of design rules and via struc - tures) to find what are the root causes of failure during the fabrication process and what design rules produce the most robust microvia struc - tures. The six D-coupons are summarized: • D-coupon 1 – Net 1 has a microvia L01-L02 stacked on top of buried microvia L02-L03 – Net 2 has offset microvias L01-L02 and L02-L03 – Net 2 has different offset pad to pad distances of tangent, 2 mil, 6 mil and 10 mil • D-coupon 2 – Net 1 has stacked microvias of L01-L02, L2-L11, and L11-L12 – Net 2 has offset microvias and buried vias of L01-L02, L02-L11 and L11-L12 – Net 2 has different offset pad to pad distances of tangent, 2 mil, 6 mil and 10 mil Jimmy Baccam