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Design007-Aug2018

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AUGUST 2018 I DESIGN007 MAGAZINE 33 spreadsheet can be difficult to work with and error prone. This is an opportunity for data to be lost, misrepresented (e.g., "What is the orientation of the BGA foot- print?") or accidentally modified. Throughout the process of pathfinding and co-design between the package and the PCB, the PCB designer needs the abil- ity to evaluate the layout at each level of detail. Providing a mechanism to evalu- ate the design, even at the higher level of abstraction of the system, ensures that the PCB designer does not make layout mistakes early in the process. Those mistakes could eventually cause PCB designer to modify the design late in the overall design process with significant effort and delay. Likewise, having a mechanism to provide signal integrity feedback to the PCB designer as they work on the lay- out can significantly shorten the design time. As the design progresses and the design team transitions to implementa- tion, the level of analysis can increase and eventually converge on a design that meets both physical and electrical requirements with the least amount of iterations. Summary Density, time and performance require- ments are intensifying and in conflict. Short of significant innovations in PCB manufacturing, design teams must work much smarter and more efficiently to meet their design goals. Planning the design up front and leveraging the pack- aging design domain in the overall design is another tool that the PCB designer can use to meet their goals. DESIGN007 Bill Acito is an IC packaging product engineer for Cadence Design Systems in Chelmsford, Massachusetts. Quick Memory Computer memory capacity has expanded greatly, allow- ing machines to access data and perform tasks very quickly, but accessing the computer's central processing unit, or CPU, for each task slows the machine and negates the gains. To counteract this issue, known as a memory wall, com- puters use a cache, or hardware component that stores recently accessed data that has already been accessed so that it can be accessed faster in the future. Song Jiang, an associate professor in the Department of Computer Science and Engineering at The University of Texas at Arlington, is using a three-year, $345,000 grant from the National Science Foundation to explore how to make better use of the cache by allowing programmers to directly access it in software. "Efficient use of a software-defined cache allows quick access to data along with large memory. With memory becom- ing more expansive, we need to involve programmers to make it more efficient. The programmer knows best how to use the cache for a particular application, so they can add efficiency without making the cache a burden," Jiang said. When a computer accesses its memory, it must go through the index of all the data stored there, and it must do so each time it goes back to the memory. Each step slows the process. With a software-defined cache, the computer can combine or skip steps to access the data it needs automatically without having to go through the memory from the beginning each time. Source: Univ. of Texas Arlington

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