Issue link: https://iconnect007.uberflip.com/i/1040234
OCTOBER 2018 I DESIGN007 MAGAZINE 45 • The solder mask tents should be the same size as the resist mask opening on these islands and provide 100% coverage. This ensures that adequate solder is present to bond to the chip • Do not use thermal spokes on any layer of the vias. Thermal spokes will reduce their thermal conductivity • Vias should be solder mask tented, not plugged or filled. The epoxy in solder mask plugged vias may not cure fully and will tend to expand and erupt if subject to enough heat Figure 1 shows (a) a top layer—solder mask and paste mask opening; (b) a plated through- hole with no solder mask opening placed very close to, but not tangent with, the sol- der mask opening; and (c) a copper pad, top layer. Note that the solder mask opening should be greater than or equal to one-half of the thermal area of component body for efficient transfer of heat. Further, all plated through-holes should be vias tied to the same net as copper pour. Vias should not have ther - mal relief on any layer or have a solder mask opening on the top or bottom layer. Figure 2 shows a different view. Implementation The most efficient way to implement this design is to make it part of your package definition, so it is uniformly applied to all similar parts. Unfortunately, many CAD pack- ages do not support the direct addition of vias and copper planes to package designs. An easy workaround is to create square surface mount device (SMD) pads to act as the top and bottom copper sinks, as well as small plated through-hole pads to act as the vias. These can then be set as unconnected pins in your com- ponent definition. You may have to create cus- tom paste and solder masks for these pins, but this is usually not too difficult. Try this design out for your next project, and you will be happy with the results. The benefits of this design speak for itself: Fewer failures and phone calls, a more consistent product, and (of course) a fatter bottom line. DESIGN007 Bob Tise and Dave Baker are engineers at Sunstone Circuits. Figure 2: A side view of the board in Figure 1 illustrating placement of joints, mask openings, and vias. Figure 1: A captive solder pad protected from the wicking effect created by the large diameter via solution. Bob Tise Dave Baker