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Design007-Oct2018

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54 DESIGN007 MAGAZINE I OCTOBER 2018 ing and chemically etching the circuit pattern on the copper foil. The lamination, imaging, and etching processes continue until the layer structure is complete. When embedding components in the multi- layer structure, several factors must be consid- ered: • Circuit layer selected for attachment • Component size (length, width, and height) • Terminal area and metalization • Location and orientation • Method for termination While thin passive components may not require any preparation before lamination, taller components will likely need developing a cavity-like pocket in the dielectric layer to ensure that the overall flatness of the finished multilayer PCB can be maintained. Regarding the attachment method for components, tin- alloy plated terminals will be most compatible with a tin-based solder alloy or a conductive polymer material that is either deposited or stencil printed onto the mounting site. Land Pattern Development Land geometry for two terminal passive com- ponents must provide 100% terminal-to-land surface contact. When terminating the compo- nent with solder or conductive polymer, users recommend extending each land beyond the terminal ends of the components by 0.25 mm (0.010"). This small extension of the land pat - tern enables the formation of a small fillet at each end of the component and furnishes visual access for inspection of the joining material before the next stage of lamination (Figure 1). Embedded Component Land Pattern Criteria Two criteria for embedding component land patterns include enabling component termi- nals to achieve full area contact and providing a minimum 0.25-mm toe protrusion for inspec- tion. However, the land pattern does not need to be greater in width than the component body and the gap or space between the com- ponent's terminals. Further, the land pattern on the surface of the PCB should be equal to the gap dimensions furnished by the manufac- turer. Refer to Table 1 for guidance in develop- ing land pattern geometry for the embedded resistor family. Embedded Component Substrate Development The discrete component parts selected for embedding within a multilayer circuit board or interposer structure will be subjected to many physical stresses during multiple lamination stages. The initial placement and joining of the device onto the inner layer substrate surface are critical factors. However, the subsequent lamination process can subject the surface- mount technology (SMT) component elements to both thermal and physical extremes not experienced when devices are mounted onto the outer surfaces of the PCB substrate. For example, the pressure on the components and laminate materials during the heating cycle can be as high as 3000 Kg for up to two hours. When selecting passive components for embedding, PCB designers should first review the outline dimensions of the candidate com- ponents, component thickness, and terminal Figure 1: Two terminal passive component land pattern criteria.

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