56 DESIGN007 MAGAZINE I DECEMBER 2018
• One should consider the presence and
interaction of the PDN and how and
where the return current flows
• Current flow is a round trip, and the
important issue is delay—not length
• RPDs produce impedance discontinuities
due to the local return inductance and
capacitive changes
• The transformation from differential-mode
to common-mode typically takes place on
bends and asymmetrical routing
• Each signal layer should be adjacent
to—and closely coupled to—a contigu-
ous reference plane, which creates a clear,
uninterrupted return path and eliminates
broadside crosstalk
• Although power planes can be used as ref-
erence planes, ground is more effective as
local stitching vias can be used
Further Reading: "Beyond Design" Columns
by Barry Olney
• Common Symptoms of Common-Mode
Radiation, Design007 Magazine, May 2018.
• Crosstalk Margins, Design007 Magazine,
July 2018.
• The Dark Side—Return of the Signal, The
PCB Design Magazine, August 2011.
• The Dumping Ground, The PCB Magazine,
August 2011.
• Embedded Signal Routing, The PCB Maga-
zine, September 2011.
• Return Path Discontinuities, The PCB
Design Magazine, April 2017.
• Routing Techniques for Complex Designs,
The PCB Design Magazine, January 2013.
• Uncommon Sense, The PCB Design Maga-
zine, August 2011.
Barry Olney is managing director
of In-Circuit Design Pty Ltd (iCD),
Australia, a PCB design service
bureau that specializes in board-
level simulation. The company
developed the iCD Design Integrity
software incorporating the iCD
Stackup, PDN, and CPW Planner. The software can be
downloaded from www.icd.com.au. To read past columns
or contact Olney, click here.
Unfortunately, return path discontinuities
can never be totally eliminated, but we can take
steps to minimize their impact significantly. As
with PDN planning, it is all about inductance.
If the return path loop area is increased in any
way, then the inductance will also increase.
Key Points:
• Critical signals should be routed first with
the precision they require
• It is important to understand the flow of
the return current path of critical signals
because these can influence the signal
integrity and EMC
• Before starting placement and routing,
detailed interconnect routing constraints
should be established
• The most efficient approach to placement
is to cross-probe between the schematic
and the PCB/routing editor
• Critical signals should be routed on a strip-
line (inner layer) adjacent to a solid refer-
ence plane to reduce radiation
•
The spacing between the signal trace and the
return plane should be as small as possible
to increase coupling and reduce loop area
• Timing can be assured and crosstalk
ignored by always making the clock or
strobe the longest signal of a matched
length group of a synchronous bus
Figure 4: Microstrip and stripline electromagnetic fields.
(Source: HyperLynx)
