SMT007 Magazine

SMT-June2019

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66 SMT007 MAGAZINE I JUNE 2019 with two floppy disks and lots of memory (256 KB, not MB), but I did save lots of money since I did not pay another $1,600 for 30 MB of hard drive. Why did I need a hard drive when I had a high-density, 1-MB floppy drive? It was more than adequate for writing the first edition of my textbook Surface Mount Technology: Princi- ples and Practice. On a serious note, the motherboard design and process steps have not changed since then. However, the complexity of newer moth- erboards has only increased with lower pitch packages that must be processed with some of the same old packages, including through- holes. Use of lead-free materials and no-clean fluxes have compounded the problem. I will have some defect data later on in this column, but the bottom line is that 90% of companies are doing too much rework. Rework adds to the cost of the product and reduces the reliability of solder joints due to an increase in intermetallic thickness each time the sol- der joint is reflowed. The reasons for this high defect rate include the following: • The processes are at very high speeds • Machines must perform them • The equipment must be characterized thoroughly, which can be defined as understanding all parameters that affect the equipment's performance • Vendors may say it is easy, but it is not • Most large companies have assigned engineers to optimize, and small companies learn as they go • Learning as you go is not an option because revenue or product schedules (or both) may be impacted adversely What Is the Defect Level in the Electronics Industry Today? Let me start by citing a paper by Stig Oresjo [1] . This is an old paper, but with the wide- spread use of fine- and ultra-fine-pitch QFP; high-pin-count BGAs; 0402, 0201, and 01005 resistors and capacitors; and lead-free materi- als and no-clean flux, yield problems are not getting any better. I must also note that the conclusions in this paper are very similar to my own findings at various client sites during my consulting assignments. Stig Oresjo conducted an extensive study at 15 major U.S. and European Tier 1 OEM and EMS companies. He used over 325,000 boards with over 550 board configurations amounting to over one billion total solder joints. It is safe to say this study used a large sample size and these manufacturers were Tier 1 assemblers who could afford AXI inspection systems cost- ing over $500,000. Only AXI machines and not functional or in- circuit-test (ICT) equipment were used in the study to determine defects. Taking into account the limitations of AXI machines, if anything, the defects counted may have been higher if ICT and functional tests were also used. Be as it may, the defect levels in the study varied between 650 to 10,000 PPM, and the average for all the boards was 1,100 PPM. You do have to follow the correct procedure for calculating PPM levels. For example, if you have 100 components on your board and all components together have 1,000 leads, the total opportunities for defects are 1,100 (i.e., all components are bad, and all solder joints are bad). Hopefully, you are not that bad and unlucky (no one is) and you only have 11 defects in that product. Your PPM level will be 10,000 (11 divided by 1,100 multiplied by one million). The beauty of calculating the PPM is that it does not matter how simple or complex your board is. However, while first-pass yield is a valid method for quality measurement, it does not distinguish between a very simple board with 1,000 opportunities for defects and a complex board with 10,000 opportunities for Use of lead-free materials and no-clean fluxes have compounded the problem.

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