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52 DESIGN007 MAGAZINE I AUGUST 2019 length from the driver to the receiving device pins but take little care of the return current path of the signal. Current flow is a round trip, and the important issue is delay, not length. If it takes one signal longer for the return cur- rent to get back to the driver—such as around a gap in the plane—then there will be skew be- tween the critical timing signals. Return path discontinuities (RPDs) can also create large loop areas that increase series inductance, de- grade signal integrity, and increase crosstalk and electromagnetic radiation. Small discontinuities, such as vias and non- uniform return paths on a bus, are becoming an important factor for the signal integrity and timing of high-speed systems. RPDs produce impedance discontinuities due to the local re- turn inductance and capacitive changes. Im- pedance discontinuities create reflected noise, contribute to differential channel to channel noise, and may promote mode conversion. In the case of differential pairs, the transforma- tion from differential-mode to common-mode typically takes place on bends, and non-sym- metrical routing near via and pin obstructions, but can also be caused by small changes in im- pedance due to RPDs. Common mode radiation is the result of parasitics in the circuit, which emanate from the unwanted voltage drops in the conduc- tors. As the signal is driven down the trans- mission line, capacitive coupling between the trace and plane conductors completes the loop and displacement current flows through the capacitance which returns to the source. The common-mode current that flows through the ground impedance produces a voltage drop in the digital logic ground system and generates magnetic radiation. To control common mode radiation, it is im- portant to minimize the common mode ground voltage at the source. Also, good grounding minimizes noise sources by presenting com- mon mode currents with a low impedance path to ground potential. If the return path of a common mode current is far from the signal path, then the common mode current will ra- diate. However, if you engineer the return path to be in close proximity to the source current, then the loop area will be small; therefore, the common mode current will not radiate. In conclusion, parasitic effects can be min- imized by separating traces as much as pos- sible, coupling signal traces close to the refer- ence planes, reducing the loop area of return current, using good stackup design practices, and lowering the AC impedance of the PDN by minimizing the decoupling capacitor mounting inductance. Key Points • Inductance, in particular, impacts virtually all signal and power integrity issues • Moving a voltage between two compo- nents requires moving energy (not a sig- nal), which requires the existence of both electric and magnetic fields • Two individual traces should be kept well apart to reduce crosstalk whilst a signal trace should be tightly coupled to its re- turn path (plane) to increase coupling and reduce inductance • Parasitic capacitance and inductance in a PCB are unavoidable • Parasitic capacitance and inductance can produce impedance mismatch along the signal path • As the frequency and rise times increase, the AC impedance of the PDN increas- es due to the inductance of the bypass and decoupling capacitors attached to the planes • The power to ground plane capacitance, of the PCB, provides an ideal capacitor in that it has no series lead inductance and little equivalent series resistance, which helps reduce noise at extremely high fre- quencies • Capacitors reach their minimum imped- ance at their resonant frequency • A capacitor is chosen so that when mount- ed on the PCB, it will resonate at the de- sired frequency • The footprint (land pattern) for a capacitor dominates the ESL • The location of the power/ground planes in the PCB stackup controls the length of the vias; this is why it is always best to