Issue link: https://iconnect007.uberflip.com/i/1156271
AUGUST 2019 I PCB007 MAGAZINE 59 However, applying FOPLP technology to substrate scale poses challenges that require more research and development. These chal- lenges are the resolution and warpage issues of FOPLP technology. If successfully implement- ed, this new technology will reshape consumer electronics resulting in higher production, low- er cost, thinner package sizes, and faster and lighter consumer electronics [2] . Acid Copper Via Fill Electrodeposition is one of the crucial steps in developing a circuit board, as this is where the network for routing electrical current is plated onto the PCB board as traces, vias, and through-holes. Copper is the conductive metal of choice due to several advantages, such as its cost and relatively high electrical conductivity. Therefore, usage of copper as an electroplat- ing metal has grown immensely over the last few decades as having the methods of plating it. Advanced, proprietary board designs re- quire cutting-edge plating tools and innovative solutions. As a result, within the last few de- cades, impingement plating tools have become a widespread tool among the plating industry. Copper via filling baths typically have high concentrations of copper (up to 200–250 g/L copper sulfate) and lower concentrations of acid (approximately 50 g/L sulfuric acid) to promote rapid filling. Organic additives are used to control the plating rate and obtain ac- ceptable physical properties. These additives must be designed carefully to tailor the cus- tomer needs, such as the size of the vias filling requirements, yield, surface copper thickness, copper distribution tolerance throughout the panel, and the shape of the via after plating. Typical plating formulations will contain car- riers, brighteners, and levelers. In theory, it is possible to fill vias with only a two-component system that includes a carrier and brightener. However, there are practical issues with two- component systems, such as large dimple size, conformal fill, and difficulty analyzing for pro- cess control. Both carriers and levelers act as suppressors but can be classified in different ways. Type I suppressors like carriers can be deactivated by the brightener whereas Type II suppressors like levelers do not undergo deactivation. Carriers are typically high molecular weight polyoxyal- kyl compounds [3] . Usually, they are adsorbed on the surface of the cathode and form a thin layer by interacting with chloride ions. Hence, the carrier reduces the plating rate by increas- ing the effective thickness of the diffusion lay- er [4] . Consequently, the energy level over the cathode surface topography is being equalized (the same number of electrons become avail- able locally for plating at all cathode surface spots) so that the resultant deposit becomes more uniform and evenly distributed. On the other hand, brighteners increase the plating rate by reducing suppression. They are typically small molecular weight sulfur-con- taining compounds, also called grain refiners. Levelers typically consist of nitrogen-bearing linear/branched polymers and heterocyclic or non-heterocyclic aromatic compounds that are typically quaternary in structure (central positively charged atom along with four sub - stituents). These compounds will adsorb se- lectively on high current density sites, such as edges and corners and local protrusions, and prevent copper over plating in high cur- rent density areas [5] . Test Method Tests were completed in an 8-liter plating cell and 200-liter pilot tanks. Insoluble anodes were used for higher applicable current densi- ties, easy maintenance, and a uniform copper surface distribution. Each bath was made up, These compounds will adsorb selectively on high current density sites, such as edges and corners and local protrusions, and prevent copper over plating in high current density areas.