Issue link: https://iconnect007.uberflip.com/i/1156271
AUGUST 2019 I PCB007 MAGAZINE 93 tioning the second route in a different posi- tion. Using this feature, we can create different impedances of the vertical trace. Figure 2 also shows that the way the second route is cut- ting through the plating is different in terms of leaving solid copper for a larger part of the slot perimeter (e.g., creating a heavy copper con- nection). Table 1 shows the dimensions we use right now. The standard dimensions are used today, and the advanced column is what we will be focusing on in the near future. These dimen- sions have to be verified with your PCB fabri- cator before starting your design setup. Pad Definitions On the outer layer, the general rule is that we need to capture the plating of the hole or in the case of VeCS the vertical trace. When de- fining the pad size, we need to take into ac- count misregistration as we do hole technolo- gy. In Figure 3, we have shown the outer layer pads as rounded squares and rounded rectan- gles. Round pads or any other shape will work as long as the rules are respected. Pad A is having the plating exposed, causing etch-out creating an open or a connection that cracks in assembly or during life. Pad B is cov- ering the full part of the plating preventing an etch-out. Figure 3: Pad definition, outer layers. *1 Minimum slot length is defined by the length of the routed slot. *2 Aspect ratio is a combination of the minimum slot length and slot width. Table 1: VeCS-1 and VeCS-2 design rules.