Issue link: https://iconnect007.uberflip.com/i/1207026
FEBRUARY 2020 I SMT007 MAGAZINE 13 to mid-1990s. When you get small enough, the cost of using a ceramic substrate instead of a PCB becomes very competitive. Many people are jumping on the IoT and 5G bandwagon for these tiny devices or key chains, and I use "key chain" as an expres- sion of size, not of the technol- ogy or application. When you're talking about end products that are the size of a key chain or a flash drive, this question is going to come: Do we need PCBs anymore for those kinds of devices? I don't know the answer because it seems to me that with wafer-level packaging, the wafer-level package could be the product when we get to that point, in many cases. The wafer-level package doesn't have to have a single device in it; it can have 2–5 devices in it in an area that's no more than a centimeter or so on a side. At that level, the issues that you resolve in terms of reliability and the complex- ity of the interconnects that are required are greatly simplified, and ceramic becomes very competitive with PCBs at that level. Matties: Is wafer-level packaging also much better for thermal situations? Bauer: If the dielectric constant is better for things like the very high frequencies that we're going to need for 5G, then the thermal man- agement becomes less of an issue. When you're processing a maximum of an 8x8 substrate to make these things with ceramic, all of a sudden, the geometries are competitive with what a PCB shop can do on an 18x24 inch panel. When you automate the technology, the costs make it very competitive. My point is that it's not all doom and gloom for PCBs, but a lot of those products are going to be looking at that kind of trade-off. They may very well find that for many of those tiny products ceramics make more sense. On the other hand, there might be a way to use RDLs in a multi-chip, wafer-level pack- age. If you do that, that's how you're going to compete with something like a ceramic sub- strate because you eliminate an assembly issue. The challenge there, again, is going to be about yield. If you're going to use a multi-chip, wafer-level pack- aging approach, then you have to make sure that you get very high yields; otherwise, you're not going to be competitive. At the other end of the spectrum, where you're not going to that level of miniaturization at the product level, you still miniatur- ize the configuration of the prod- uct, but you have a product that's much larger. Even with a couple of inches on a side, the PCB suddenly becomes far more capable. The ability to use RDLs on top of a PCB, for example, makes more sense and allows you to get to that point. The barrier to all of that is going to come down to power supply. It's not going to be signal and connecting the circuits because those kinds of devices are not going to be super complex. The complexity will be buried in the chip, so the issue is going to be how to get the cost down along with the size and maintain the simplicity. PCBs have an advantage there, so there's going to be a size trade-off when you look at those cost com- parisons. Again, cost is going to drive it all. _____________ RDL and Shrinking Die Sizes Holden: A term that seems to have come back is RDL. I heard that term being used 20 years ago, but now the RDL has shown up again associated with wafer-level packaging. Korf: I have seen that in Asia in cellphones and IoT devices; they want to get rid of that package and drop the device down to the board where, theoretically, it's more reliable and somewhat cheaper. However, RDL is not very well installed over in Asia because it's extremely expensive to set up a line to do that. The concept is to get rid of the device package and drop the die down onto the mainboard, like in cellphones. Dana Korf