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72 DESIGN007 MAGAZINE I MAY 2020 the waveform, reducing reflections. Providing we choose the right value to match the imped- ance of the transmission line, the circuit func- tions perfectly, although the higher frequen- cies are dampened. Depending on the logic family, the fall time is usually slightly shorter than the rise time. This is due to the design of typical CMOS out- put drivers. For the same feature size transis- tor, an n transistor can turn on faster than a p transistor. This means switching from high to low, the falling edge will be shorter than the rising edge. In general, signal integrity prob- lems are more likely to occur when switching from a high-to-low transition than from a low- to-high transition. This is something to look out for when using double data rate (DDR) memory, where the device is clocked on both the rising and falling edges of the waveform. In the time domain, the most important mer- it for a signal is the rise time. The rise time is typically measured from the 10% point to the 90% point on the rising edge of the signal, al- though the industry is moving toward 20–80% to eliminate the distortion at the extremities. The shape of the rising edge strongly influenc- Figure 2: Series terminator rolls off the high-frequency components to reduce ringing (simulated in HyperLynx).

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