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26 DESIGN007 MAGAZINE I OCTOBER 2020 computer in the future? How do you want to manage issues related to cache, memory, and processing? For each of these sections, we had different experts write various sections. After that, we move to the future technolo- gies like silicon photonics. How is that going to be affected by co-design? How can co-design improve silicon photonics? The more futuristic stuff was at the end of the chapter, where we addressed things like neuromorphic comput- ers and quantum computing because they def- initely will necessitate some type of co-design for their inception. Shaughnessy: In the co-design chapter, you all talk about how EDA tool vendors now offer PCB design tools with packaging design func- tionality. Do you see that more often? Schutt-Ainé: It all depends on who you talk to. What is heterogeneous integration? People think that Moore's law is going to run out of steam eventually. This whole idea of getting a new node every 18 months, people anticipate that at some point, it's going to come to a halt. Instead of cramming more components into one chip, you're going to have more creative methods for combining not only the differ- ent domains but also various levels—namely package, chip, and the board—and technolo- gies. How do you combine them? What happens in optics is not necessarily compliant to Moore's law. At the same time, when you look at what happens at the PCB level, the components will scale according to the wavelength but not the technology. Things get smaller only as the frequency goes up. It's like you're dealing with different rules, and that's the whole idea. That's the impetus behind heterogeneous integration. However, last December, I was at a confer- ence in Taiwan, and that's where TSMC is. They don't seem to buy into HIR with the same level of enthusiasm as people do in other places, like they do in the U.S. In Taiwan, peo- ple really believe in Moore's law. According to them, when Moore's law stops, the impact on their economy will be quite visible. Shaughnessy: One section explains how simu- lation has to move from a 2D view to 3D. Schutt-Ainé: For instance, with 3D chips, there's a whole host of issues coming as a result of the third dimension. The thermal issues are going to become more serious. In the first version of our chapter, we did not have the electrical-thermal aspect included, but we just included that last month. The next version of the chapter will include a whole section on electrical-thermal co-design, and it touches on issues related to 3D. Removing the heat on the treated chips is a big challenge. Modeling is also a challenge. Johnson: Depending on what you load inside, the package is going to change the thermal characteristics, which you then need to accom- modate on the PCB. There's a lot happening. Schutt-Ainé: I look at co-design as an enabler of heterogeneous integration. Our focus is more on what the EDA companies should be doing. What kind of tools should they be mak- ing available to the designers? It's a difficult task because you're looking at combining very different types of algorithms. There's also the database. How do you manage the informa- tion? The chip information is managed in one way, and the database is usually managed in a certain format. The package level is in yet a different format, and then there's the board level. How do you make all of that? How do you ensure good communication between the three different levels? On the circuit side, you start with Maxwell's equations to help predict how the waves are What is heterogeneous integration? People think that Moore's law is going to run out of steam eventually.

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