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58 PCB007 MAGAZINE I OCTOBER 2020 Introduction In the first half of 2020, FC-BGA substrates have shown 30% YoY growth, with continued growth alongside FC-CSP expected in the up- coming years due to robust demand and in- creasing complexity of package designs. Pack- age complexity is being driven by market growth in servers, storage, 5G network infra- structure, various AI acceleration, and with the increasing adoption of heterogeneous integra- tion in chip design. Heterogeneous integration addresses the in- creasing requirements for low-power, low-la- tency, and real-time data processing in devices by combining multiple components or chips on a substrate. The success of the system-in- package (SiP) in mobile electronics is a famous example of this. The reduced power and in- creased processing capability that is enabled by these types of designs enable the current generation of 5G-enabled smartphones and IoT devices, which will see major growth as we progress through the 5G and Industry 4.0 automation rollouts, respectively. To meet the ever-increasing routing density requirements needed by all of this, today's or- ganic substrate manufacturers are using a se- lection of advanced metallization technologies to create line and space dimensions approach- ing that of wafer-level packaging. In this article, we examine the metallization processes for the formation of fine lines and spaces on IC substrates. We touch on circuit formation and starting materials and key tech- nological aspects of the semi-additive process (SAP) for IC substrate primary metallization. We also discuss electroplating technologies for RDL, coreless substrates, and thermal manage- ment; plating equipment for large area panel- level packaging substrates; and the anisotropic final etch for circuit definition. Starting Copper Foil Thickness or Lack Thereof High-end packages tend to have larger die sizes (200 mm 2+ ) with many I/O (1,000 up to 10,000) and may be combined with other dies or devices on the same substrate. The result- ing routing requirements for these systems in- volve extremely high circuit density, very fine line/space geometries, and one or more redis- tribution layers. In contrast to HDI for PCBs, Advanced Packaging Substrate Metallization Processes in the Age of Heterogeneous Integration Article by Leslie Kim, Jordan Kologe, Bill Bowerman, Kesheng Feng, and Richard Bellemare MACDERMID ALPHA ELECTRONICS SOLUTIONS