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Design007-Jan2021

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38 DESIGN007 MAGAZINE I JANUARY 2021 the planes should be allocated as dedicated power planes. The challenge is balancing the requirements of power distribution with the requirements for reduced crosstalk from signals changing return planes. In principle, a signal line will see exactly the same characteristic impedance if the return plane is at ground potential or 12 V potential or anywhere in between. The problem with using a different voltage plane than ground to carry return current is when the signals change layers. 5. When a signal trace switches layers, we use a via to carry the signal current. If the return plane also changes, we will achieve the lowest crosstalk between all the signals switching layers when we also provide a via to carry the return current from the starting plane(s) to the final plane(s). This is a low- impedance via shorting between the two dif- ferent return planes. This is only possible if the return planes are the same voltage. If they are at different voltages, we can't add a shorting via between them. This is a strong motivation to only use ground planes as the return planes for signals. 6. At best, if the two planes are a different voltage, we can add shorting vias between the two planes with a DC blocking capacitor between them. The loop inductance through a DC blocking capacitor can be as much as 5x higher impedance of a direct shorting via. It is a poor approximation to a shorting via, but the best we can do. 7. When signals change return planes and the planes are at different voltages, we run the risk of launching high bandwidth return currents into the cavity formed by the two planes. This is a source of long-range crosstalk and poten- tially a source of radiated emissions noise. One solution to reduce the noise in the power- ground cavity is by using very thin dielectric in these layers. This suggests that when power planes are used, they should be paired with closely spaced adjacent ground planes. Once the order of the signal layers and planes is set, the dimensions can be calculated based on the line width of signal traces, the dielectric constant of the laminates used, and the target single-ended or differential impedance. This is where a 2D field solver comes in handy to define the cross section of microstrip traces, single layer stripline and dual layer strip line traces. If you don't follow these tips, it does not mean your board will not work. Unfortunately, there is no way of knowing if your stackup design will work or not unless you do a detailed analysis based on the driver models and 3D electromagnetic analysis of all the worst-case signal and power paths. Implementing these tips is about risk reduction. They are part of a balanced diet of best stackup design practices, best signal routing design practices, and best power distribution design practices. And like all design guide- lines, buyer beware. Always consider the best design practices, but also always do your own analysis. DESIGN007 Dr. Eric Bogatin is currently the dean of the Teledyne LeCroy Signal Integrity Academy and an adjunct professor at the University of Colo- rado, Boulder in the ECEE department. Eric has written a number of books on high-speed digital engineering, including Signal and Power Integrity—Simplified, Bogatin's Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications, and Principles of PDN Design— Simplified co-written with Micron's Larry Smith. To contact Eric Bogatin, click here. The challenge is balancing the requirements of power distribu- tion with the requirements for reduced crosstalk from signals changing return planes.

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