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Design007-Jan2021

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54 DESIGN007 MAGAZINE I JANUARY 2021 on your board. For example, if you call out 1-oz inner layers and 2-oz finished outers after plate, the internal and external layer space should not exceed 0.005" or 0.125 mm, and the external layer space (copper feature to cop- per feature) starting on half-ounce with a 1-oz plate-up should not exceed 0.004" or 0.1 mm. This will save you a lot of grief from a fabrica- tor calling you to tell you your chosen stackup copper weight does not support your available design space. 2. What to Call Out on Your Fab Notes and Stackup Here is a short list of what to call out on your fab notes and possibly even on your stackup. This information should exist some- where; whether you choose to have it on both the stackup and in the fab notes is really up to you. But again, if you choose to have the fol- lowing information on both, they should not conflict with each other, such as: • Material type • Desired copper weight (as long as it does not conflict with your available space) • Specific dielectrics • Controlled impedances • Layer configuration First, call out the material type. I recommend calling out your material by the 4101/# as opposed to calling out a specific material type unless directed by the end-user to do so. This can save you some time in negotiating with the board fabricator, as not all fabricators have all materials in stock or even normally carry them. Some materials, such as the Rogers 3000 and 4000 series of materials, should be built as a core-cap type construction. I would recom- mend calling out material by name if you have a specific function that requires said materi- als—things like high temp, high speed, low Dk, low loss tangents, or even the use of very thin dielectrics to take advantage of the inher- ent decoupling properties of thin dielectrics. Note: Any use of thin dielectrics for this purpose should reside near the external layers and not in the center of the board stack if at all possible. If you need to call out a specific material type, consider adding a few alterna- tives so that whoever builds your part has a shot at having or stocking it. Having said that, some research on your part will be required to evaluate the various materials you are add- ing as alternatives. They should be true alter- natives and consistent with your performance expectations. Second, call out the copper weights involved. Can you mix copper weights internally? Yes. Many designs depend on the use of core mate- rial with a lighter copper weight on one side and a heavier weight on the opposite side, such as a signal side with lower space values and a plane side with higher space values. However, you should not have a huge mis- match between copper on each side for the sheer processing of the cores through develop, etch, and strip. Something like two- or three- ounce on one side and three-eighths or half- ounce on the opposing side should be avoided, but half-ounce on the signal side and one-oz on the plane side is not at all out of the ques- tion. I may be "beating a dead horse," so to speak, but once again, your stackup notes should not conflict with the stackup depiction. I cannot stress this enough. And, as before, the copper weight must fit your available space. Enough said. Next, call out in the stackup any specific dielectrics but not necessarily on the fab notes as well. Specific dielectrics do not necessarily mean the part has controlled impedances. Some designs require thin dielectrics for close to the outer layers and thicker dielectrics in the middle of the stackup for performance reasons, such as having an eight-layer stackup with a stackup as a signal top, plane layer 2, signal layer 3, plane layer 4, plane layer 5, signal layer 6, plane layer 7, and then signal layer 8, increasing the distance between layers 4 and 5 and keeping layers 1, 2 and 3, and 6, 7 and 8 as thin as pos- sible works well for both impedances and per- formance characteristics. Additionally, as men- tioned before, the use of very thin dielectrics can work well for inherent decoupling and minimizing the amount of decoupling caps needed on the outers if used between PWR and GND layers.

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