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Design007-Jan2021

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70 DESIGN007 MAGAZINE I JANUARY 2021 Planner, iCD Coplanar Waveguide Planner and the more recent iCD Materials Planner software. Over the years, I have also written many stackup planning and material selection appli- cation notes and columns. Rather than repeat all the valuable points, made in these articles, I will list them below: 1. Arguably the most downloaded (and most plagiarized) is Multilayer PCB Stackups. You can find this article in numerous sites on the internet but sadly not attributed to me. It covers stackup planning basics and looks at the most common multilayer con- figurations (4-16 layers) and their associ- ated pros and cons. 2. The Perfect Stackup: This application note discusses how to plan a multilayer PCB stackup to obtain the ideal stackup for high-speed design. Stackup Planning Parts 5 and 6 elaborate on this. 3. Stackup Planning and the Fabrication Process: Before starting a PCB design, we need to plan the PCB stackup for optimized performance, ensure that the selected substrate materials are available and clearly document the stackup so that it can be fabricated to engineering specifications. 4. Stackup Planning Part 1: The PCB substrate must be selected based on specifications to achieve the best possible performance of the product. 5. Stackup Planning 2: Comprises defini- tions of basic stackups starting with four and six layers. Of course, this methodol- ogy can be used for higher layer count boards—36, 72 layers and beyond. 6. Stackup Planning Part 3: Looks at higher layer-count stackups. As the layer count increases, these rules become easier to implement but decisions regarding return current paths become more challenging. 7. Stackup Planning Part 4: Ten plus layers require very thin dielectrics to reduce the total board thickness. This naturally pro- vides tight coupling between the adjacent signal and plane layers reducing crosstalk and electromagnetic emissions. 8. Stackup Planning Part 5: To achieve the next level in stackup design, one needs to not only consider the placement of signal and plane layers in the stackup, but to visualize the electromagnetic fields that propagate the signals through the substrate. 9. Stackup Planning Part 6: Impedance variables. Interconnect Impedance is a trade-off between the variables—trace width, trace (copper) thickness, dielectric thickness and dielectric constant. Then, if you also need to include differential impedance, the trace clearance comes into play. For minimum crosstalk, coupling also must be considered. 10. Material Selection for Digital Design: What types of materials are commonly used for digital design and how to select an adequate material to minimize costs. 11. Material Selection for SERDES Design: Many challenges face the designer work- ing with new technologies. For SERDES— high-speed serial links—loss, in the trans- mission lines, is a major cause of signal integrity issues. Loss can be mitigated by the correct selection of materials. 12. It's a Material World: Precise material selection is crucial to the performance of the today's multi-gigabit designs. Design techniques constantly change and the current best practice for high-speed stackup design is: I. Closely couple GND/PWR planes on layers 2 and 3 and the second and third layers from the bottom (Figure 2). This lowers the AC impedance of the PDN and provides low inductance power to the devices. Figure 2: Plane pairs close to BGAs.

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