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Design007-June2021

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JUNE 2021 I DESIGN007 MAGAZINE 51 • High-speed SERDES devices are the dominant implementation of I/O interfaces at speed of 2.5 Gbps. • Implementing high-speed serial links can be challenging for the PCB designer. Any small discontinuity in the physical geometry, along the transmission path, can significantly degrade the signal. • A capacitor is typically placed in series with both differential signals to remove common mode voltage differences between ICs or different technologies. • Any capacitor placed in series with the signal path tends to pass the high- frequency AC portions of the signal, while simultaneously blocking the low-frequency DC portions. • Routing serial links on the outer microstrip layers becomes necessary to avoid discon- tinuities, layer transitions, and via stubs that create reflections. • The most elegant solution to AC coupling is to use a smaller capacitor such as a 01005. A 200 µm trace can be used in conjunction with a 01005 package of 200 mm land width, to avoid the impedance mismatch. • The AC coupling capacitors should be placed close to the receiver unless defined by a standard whereby they are specified on one end or the other end, or occasionally on both ends. • Solder mask on microstrip traces will make them more unpredictable since it's difficult to control the thickness of coating on the top of traces and in the valley between them. • If you are using ENIG plating, be careful with how thick the gold and nickel layers are, since you might end up with narrowband resonance. • Solder mask only impacts on signal integrity above 12 Gbps. DESIGN007 Resources For more on this topic: 1. Beyond Design: AC/DC is Not Just a Rock Band, by Barry Olney, Design007 Magazine, April 2018. 2. Surface Finishes for High-Speed PCBs, by Barry Olney, The PCB Design Magazine, June 2014. 3. High speed serial link (SERDES), Introduction, Architectures and applications, by Abdallah Ashry, academia.edu. 4. Serializer and Deserializer (SerDes) for High- Speed Serial, by Dianyong Chen, et al. 5. High speed interconnect optimization, by Mal- likarjun Vasa, et al. Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board- level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be downloaded at www.icd.com.au. To read past columns or con- tact Olney, click here.

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