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Design007-Nov2021

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24 DESIGN007 MAGAZINE I NOVEMBER 2021 e lowest level of traceability needs to be maintained to reduce the quantity of product that will be scrapped or reworked when an issue is discovered. Electronic records are critical for this. Information contained on paper or in cross- section slugs are easily lost. CFX/IPC-2581 is a good method to ensure the entire data integrity is maintained for assembly. CFX has not been implemented for PCB fabrication at this point. e IPC-2581 structure incorporates both PCB fabrication and assembly/test data. Solutions ere are many data formats and encryption formats available to securely transmit data. e IPC-2581 intelligent data package, along with the IPC-CFX collected data history, allows for a significantly better chance to hold all the revisions in a common dataset. It is essen- tial that the data management system contain as much data that can be readily queried. All touch points and actions must be recorded so proper root cause analysis can be quickly and accurately performed. e seemingly high cost to automate, record, control access, and restrict data is easily recovered due to process yield improvements, overhead cost avoidance, and fault analysis improvements. e industry's existing standard data trans- fer process needs to evolve from manual intervention to a fully automated transfer if we ever want to reduce data management complexity. DESIGN007 Dana Korf is the principal consultant for Korf Consultancy. by Brad Griffin 3D-ICs meet the demand for integration of dis- aggregated system-on-chip (SoC) architecture built from multiple chiplets and heterogeneous architec- tures such as analog, digital, optoelectronics, and non-volatile memory. They provide improved per- formance and area, low power consumption due to short interconnection length, and reduced signal delay. We can broadly classify 3D-ICs as transistor- level 3D integration, system-in-package (SiP) and system-on-package (SoP), and wafer-level through- silicon vias (TSV)-based 3D integration. TSVs are the paramount interconnection struc- tures in 3D-ICs. 3D-ICs with TSVs have a broad impact on applications that require ultra-light, small, and low-power devices to achieve high-throughput memory access and hybrid logic circuits. They serve as vertical channels for interplane communication, offering a wide range of granularity. TSVs increase the average number of connections between two dies up to 10 times compared to the chip-to-chip connections on a PCB. They improve capacitance by six times, average connection length by 200 times for 3D stacking vs. side-by-side stacking, and relative interface power between the CPU and DRAM by approximately six times. Signal integrity (SI) implies the capability of the signal to propagate without distortion, ensuring both the clock signal timing and the quality. Accu- rate SI analysis ensures both functionality and reg- ulatory compliance. There are many factors to be considered in the 3D-IC structure for reliable trans- missions, including loading effect and reflection of various 3D structural elements such as limitation of high-speed signaling by capacitive loading and impedance mismatching, reflection, and crosstalk between TSVs, die-to-die vertical coupling, jitter by inter-symbol interference, vertical die-to-die EMI coupling, high-frequency noise coupling and trans- fer, and RF sensitivity reduction by EMI. To read this entire column, which appeared in the Design007 Week newsletter, click here. All Systems Go! Signal Integrity Signoff of 3D-IC Systems

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