Issue link: https://iconnect007.uberflip.com/i/1426508
64 DESIGN007 MAGAZINE I NOVEMBER 2021 multiple components and/or the intercon- nects between them. e data could be logical (schematic-based), physical (layout-based), or a combination of the two. ey could be developed internally (e.g., power supply, antenna, or standards- based interfaces between processor and memory), or leveraged from external sources (e.g., reference designs from IC vendors). ere are a lot of lessons to be learned from reuse in IC and soware design that can now apply to PCB design. ese include: • Reuse requires a systematic, new process to verify known-good data, store the design data and associated verification results where they can be found, and then ensure that searching for existing IP is part of the process for new designs. It's a classic case where a little added process complexity resolves much more significant challenges, but at the time it's just another hurdle to overcome. • Once IP is being reused, it becomes critical to track it in case changes are required. e impact of changes must Figure 1: IP reuse manages complexity with a building-block design process that accelerates product development. circuitry, formal management of the source circuit blocks allows for proper tracking of critical information, such as the IP owner, ITAR classification, and any export control requirements. In PCB systems, reusable IP comes in three primary forms: 1. Component libraries: Most are familiar with a central library of part models—in the form of symbols, 2D/3D footprints, simulation models, etc.—that get reused across multiple designs. e current focus here is on team synchronization (ensuring everyone is always using the same library data) and library completeness (measured by the number of parts and the inclusion of newer elements like 3D representations and multi-physics simulation models). 2. Boards: Teams oen reuse internal or COTS boards across many multi-board systems. Incorporating these boards into new projects is critical so that the complete system can be modeled without data redundancy. 3. Circuit blocks: ese fit between #1 and #2 in design hierarchy and consist of