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58 DESIGN007 MAGAZINE I JANUARY 2022 resistances of the series elements between the source and load, the voltage across the load will be less than what we wanted. For our power distribution networks we need to start a systematic design by finding the noise budget. Figure 3 shows its elements. e vertical height of each line represents volt- age with respect to the reference (we may call it ground), which is not shown; if drawn pro- portionally for a supply rail where the maxi- mum voltage deviation is just a few percent of the nominal voltage, the reference line would be a few pages further down. e V max – V min range is what our load can tolerate at any given moment. If the load current changes with time, we will have some transient noise; it is repre- sented by DV on the sketch. e purpose of the sketch is to illustrate the process of how we can calculate the DV range that is allowed for tran- sient noise. e V max – V min range is not entirely available for the DV transients. e linear and switch- ing regulators have a finite accuracy as to how accurately their nominal voltage can be set and how much it may dri over time, over the specified temperature range, due to unit-to- unit variations, changes of input voltage, etc. We call that range the set-point inaccuracy. Periodic and random deviation (PARD) cap- tures any self-generated AC fluctuation of the DC source itself. In switching regulators, it is primarily the switching ripple on the output. In linear regulators we don't have switching ripple, but the electronics in the regulators still has some random noise, which may be impor- tant to know for very sensitive loads. And we also have the uncompensated DC drop. We have to subtract all of these from the V max – V min range to get DV. ere are several details that are useful to keep in mind when we consider uncompensated voltage drop. e first is the obvious complica- tion when we think about the entire flow of the design from beginning to end: when we start our design process, we don't have any details worked out yet and still we need an input num- ber—the uncompensated DC drop—which eventually will depend on the stackup, mate- rial choice (remember: DC and RA coppers have slightly different conductivity), compo- nent placement and layout. We need to accept the inevitable: If we try to push the envelope and make a cost-effective, lean, and optimized design, the design process will be iterative. ere is one trick, though, that may help us under some circumstances: If we know that the load current is not changing much with time, temperature or due to unit-to-unit differences, we can easily remove most of the uncompen- sated voltage drop even if the regulator sense point is monitoring the voltage before the volt- age drop happens. As long as the voltage drop is not so huge that the regulator could not compensate for it, for the design process we can assume zero uncompensated voltage drop. With this assumption we complete the entire design and once we figure out what is the actual voltage drop beyond the sense point, we just statically raise the regulator's output volt- age by that amount. For cases when the DC load current may change a lot, we can use regulators with an external sense connection and route it on the board close to the load (Figure 4). If our design process does not include the package and our design requirements are formulated at the board-package interface, we are all set; connecting the voltage regulator sense point on the board under the package Figure 3: Components of the noise budget.