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74 DESIGN007 MAGAZINE I APRIL 2022 set up as a stand-alone boundary-scan station integrated or combined with functional test and in-circuit test (ICT) or when using flying probe testers (FPT). ere are several control and data lines that form the test access port. ese lines, known as test clock and test mode select, as well as an optional test reset line, are connected in paral- lel to the semiconductors in the boundary scan chain. Connections designated test data input and test data output are daisy-chained together to provide a path around the boundary scan enabled devices. Functional data is sent into the test data input node of the first semiconductor. Output from the first device is next connected to test data input of the next device(s). Boundar y scan implementation benefits include: • Accelerate new product development • Reduced time-to-market • Fast and efficient test program generation • Ideal for boards undergoing design revisions e JTAG test procedure is highly versa- tile and will be used across the circuit board assembly production process for design veri- fication, in-system programming, testing, and debugging procedures. Boundary scan testing will rely on built-in component test functions, typically accessing four to six terminals of the semiconductor package as noted above. ese terminals enable full analysis of the device. Fault detection is achieved by exploiting test- enabled components on the PCB which, in addition to their normal functionality, provide special test logic that scans through the serial JTAG interface. X-JTAG has been working with a variety of test solution providers, including flying probe test system providers, to offer the best-in-class test capability and value for users. Ensuring continu- ous design for test improvement, and that testing ball grid array (BGA) devices on dense boards does not affect test coverage in, will require combining JTAG boundary scan and bed-of- nails with high-speed flying probe test systems (Figure 3) to achieve the absolute best results. Powerful and easy to use, integrated testing enables engineers to minimize test time while maximizing test coverage. Documentation Transfer for Assembly Test e test program engineering specialist will require the netlist for the specific circuit board designated for testing, and will include bound- ary scan description language files for the boundary scan for all components contained within the circuit. With this information it is Figure 2: Stand-alone JTAG/boundary-scan test station. (Source: JTAG Technologies) Figure 3: Flying probe test system for providing maximum access. (Source: SPEA Test Systems)

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