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Design007-June2022

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60 DESIGN007 MAGAZINE I JUNE 2022 of light for domestic advanced technology PCBs and advanced packaging. is drive has led us to industrializing next- generation additive manufacturing: the Aver- atek Semi-Additive Process, or A-SAP™. With this technology and state of the art equipment, Calumet Electronics is now providing next- generation capability and capacity for tightly packed BGAs and other features on the most challenging circuit boards, realizing features below 25 microns. Calumet is an NADCAP, AS9100D, MIL PRF-55110 and IPC-1791 cer- tified facility. I have the distinct pleasure of representing Calumet Electronics as its chief technology officer, charged with strategically develop- ing and advancing the most complicated and needed PCBs and ultra-high-density PCBs for the domestic market. e past nine years have been a rewarding experience, but one of the most significant technologies to allow breakthrough success is the use of the A-SAP processes. Dunn: Calumet Elec tronic s wa s the f ir st licensee of Averatek's A-SAP process. You have navigated not just the learning curve for fabrication, but also the design learning curve, and how to best apply this technology. Because this technology is still new to many, can you talk about the process and its benefits for PCB designers? LaBeau: It is always difficult to usher in new technologies within an industry which has struggled with offshoring, stunted innovation, and lack of adoption for new processes. With that said, industrializing Averatek's process has been a fulfilling experience that has opened many new doors of opportunities, ones we never knew were available. It's a semi-additive process for feature realization, allowing the United States to break through 60 microns. It allows for reaching down to limits of the photolithography equipment, around 12–15 microns currently, but testing at less than 10 microns. is technology allows for leapfrog opportunities to unite chips (semiconductors) with printed circuit boards, all here in North America. For the designer, this is a true game changer. e designer can now use finer lines and spaces to effectively fan out traces from BGAs and other devices without adding more layers or introducing increasing complicated stacked or staggered microvia structures. Designing with finer lines may result in re-set- ting the manufacturing curve of complexity. Imagine reducing the number of sequential laminations, and not worrying about multiple stacked features; the opportunities are virtu- ally endless. Now we just need to adopt this new technol- ogy that has been industrialized and qualified. Dunn: Meredith, where are you in the pro- cess development cycle? I know readers will be curious about reliability testing and data. Would you share your experience? LaBeau: We have finished all the process devel- opment over the past two years, moving the manufacturing readiness level from a five to nine (low-rate production). rough this development process, we have done significant testing for reliability including peel strengths, thermal stress and cycling with microvias, as well as staggered structures. Additionally, we have processed over 1,000 panels, tested 10 micron plated 1x.

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