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Design007-Oct2022

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30 DESIGN007 MAGAZINE I OCTOBER 2022 Key Points • Embedding signals between the planes reduces these emissions and susceptibility to radiation as well as providing electro- static discharge protection. • It is best to keep well away from the edge of the board when routing on the outer microstrip layers. • On a multilayer PCB, critical signals should be routed on a stripline layer adjacent to a solid reference plane to reduce radiation. • e propagation speed of microstrip is always faster than stripline—typically by 13-17%. • Many routers these days have matched delay routing which enables one to take the flight time variation into account. • e trace routed on the inner layer 4 exhibits between 4 to 10 dB less noise than the trace routed on the top layer. DESIGN007 Resources 1. Beyond Design by Barry Olney: The Fundamen- tal Rules of High-Speed PCB Design Part 4; Embed- ded Signal Routing; Signal Flight Time Variance in Multilayer PCBs. Barry Olney is managing direc- tor of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board-level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be downloaded at www.icd.com.au. To read past columns, click here. In a newly-published study, a team of researchers in Oxford University's Department of Materials led by Harish Bhaskaran, Professor of Applied Nano- materials, describe a breakthrough approach to pick up single nanowires from the growth substrate and place them on virtually any platform with sub- micron accuracy. This technique is readily scalable to larger areas, and brings the promise of nanowires to devices made on any substrate and using any process. This is what makes this technique so powerful. The innovative method uses novel tools, includ- ing ultra-thin filaments of polyethylene terephthal- ate (PET) with tapered nanoscale tips that are used to pick up individual nanowires. At this fine scale, adhesive van der Waals forces (tiny forces of attrac- tion that occur between atoms and molecules) cause the nanowires to "jump" into contact with the tips. The nanowires are then transferred to a transparent dome-shaped elastic stamp mounted on a glass slide. This stamp is then turned upside down and aligned with the device chip, with the nanowire then printed gently onto the surface. Deposited nanowires showed strong adhesive qualities, remaining in place even when the device was immersed in liquid. The research team were also able to place nano- wires on fragile substrates, such as ultra-thin 50 nanometre membranes, demonstrating the delicacy and ver- satility of the stamping technique. (Source: University of Oxford) Discovery of New Nanonwire Assembly Process Could Enable More Powerful Computer Chips

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