Issue link: https://iconnect007.uberflip.com/i/275965
12 The PCB Design Magazine • March 2014 by Mark Gallant DoWnsTreAM TeChnoloGies The goal of minimizing the time and cost for engineering a new product and getting it to market before the competition is a constant struggle for developers of leading-edge electron- ic products. The complexities of the electronic component supply chain, reductions in quali- fied staff, and managing globally distributed en- gineering teams are just a few of the challenges. Eliminating bottlenecks can dramatically re- duce concept-to-production time in a product life cycle. This is the Holy Grail in the quest for corporate efficiency. To reduce or eliminate these bottlenecks in new product development, many electronic engineering teams are looking inward and reas- sessing the efficiency of their product engineer- ing process. From concept to design, fabrica- tion, and assembly, there are process inefficien- cies that result in delays. The usual excuse for not reassessing, "This is the way we have always done it," may be a sign of complacency in an inefficient engineering process. Quite often the assessment involves an eval- uation of the current EDA tool set proficiency. Frequently, these tool evaluations evolve into an assessment of how their current tools per- form against competitive tools. Loyalty to the incumbent EDA provider is a lesser consider- ation than the efficiency of the tool. As a result, entrenched EDA suppliers are forced to perform benchmarks for current users or risk a decline in their customer base. feature Mitigating the High Cost of PCB Documentation