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12 The PCB Design Magazine • October 2014 Sink or Swim at 28 Gbps feature Introduction Design of PCB and packaging interconnects for data links running at 28–32 Gbps bitrates and beyond is a challenging problem, to say the least. It requires accurate electromagnetic analysis over extremely broad frequency band- width from DC to 40–50 GHz. What compli- cates it further is the absence of the broadband frequency-continuous dielectric and conductor roughness models. In addition, the final board is not usually manufactured as designed due to uncontrolled variations and manipulations by the board manufacturers to "dial in the imped- ance." It is also extremely difficult to make high- quality measurements up to 50 GHz. So is it pos- sible to design and manufacture interconnects and have acceptable analysis-to-measurement correlation up to 40–50 GHz systematically? To answer, four necessary elements for design success were formulated [1] . One of the elements is systematic benchmarking of manufacturing, measurement, and the software. Systematic in Abstract How do you know that your signal integ- rity software is qualified for the analysis of interconnects with signals running at 28–32 Gbps? The software vendor told you so? How does the vendor know? Most of the time, it is a "sink or swim" situation for the SI software user. One way to figure it out is to use a valida- tion platform, such as Wild River Technology's CMP-28/32 Channel Modeling Platform, which provides interconnect structures specifically de- signed to benchmark the signal integrity soft- ware at these data rates. Just run the post-layout analysis of interconnects on the validation plat- form and compare with the pre-qualified mea- surements taken by an expert up to 50 GHz. The validation process may be that simple in general, but some peculiarities are discussed in this article. by Yuriy Shlepnev SIMBErIan InC.

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