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62 The PCB Design Magazine • March 2015 (yellow) and 2V5 (orange), supplies are routed on the top layer and the core fills (copper pours) are placed directly under the processor chip. Since there is little room for routing on the top (or bottom) layer anyway, this does not affect the routability of the design but rather has the added advantage of a low inductance power supply close to the chip. In conclusion, split ground planes are a great way to create discontinuities of impedance, crosstalk and EMI—so, don't use them! Con- trolled routing is the key to a successful mixed signal design. The ground planes should not be split, but rather partitioned and a pass-through gap left in the plane so that vital signals can enter and leave the sensitive area. Points to Remember • The best way, to connect AGND and DGND together through a low impedance path, is to use only one ground plane to begin with. • When both analog and digital devices are used on the same PCB, it is usually nec- essary to partition (not split) the ground plane. • Keep-outs create issues in that control sig- nals need to go into and out of these sensi- tive areas. • If space permits, keep these circuits 10 mm from any critical signals to avoid parasitic coupling. • Route fences, rather than route keep-outs, are useful to control the routing. • The planes are not split but rather a pass- through gap is left in the plane so that control signals can enter and leave that area. Route fences are also very effective is controlling an autorouter. • At low frequencies, current follows the path of least resistance. But at high frequencies, return current flows the path of least in- ductance—which happens to be directly under the signal trace on a plane (power or ground) that is closest to the trace. • When a trace crosses a gap in the adjacent plane, the return current is diverted from underneath the trace in order to go around the gap. This causes the current to flow through a much larger loop area. • A major EMC problem occurs when there are discontinuities in the current return path. Routing traces via the pass-through gap alleviates these problems and still al- lows vital signals to enter and leave the sensitive area. • Pouring copper over the entire outer layers is not recommended. • One of the keys to determining the opti- mal PCB stackup is to understand how and where the return signals actually flow. The schematic only shows the signal path, whereas the return path is implicit. • The ICD Stackup Planner allows the de- signer to determine any number of single- ended and differential impedance technol- ogies on the same substrate. • Use as many GND planes as possible in the stackup. The decoupling capacitor and IC GNDs naturally provide stitching vias to connect the GND planes in most cases. • Supplies may be routed on the top layer and the core fills (copper pours) are placed directly under the processor chip. • Split ground planes are a great way to cre- ate discontinuities of impedance, crosstalk and EMI—so, don't use them! PCBDESIGn References 1. Barry Olney's Beyond Design columns: Mixed Digital-Analog Technologies, The Plain Truth About Plane Jumpers, and Interactive Placement and Routing Strategies. 2. Howard Johnson: High-Speed Digital De- sign—A Handbook of Black Magic. 3. Henry Ott: Electromagnetic Compatibil- ity Engineering. 4. The ICD Stackup and PDN Planner: www. icd.com.au. Barry olney is managing direc- tor of in-Circuit Design Pty ltd (iCD), Australia. This PCB design service bureau specializes in board-level simulation, and has developed the iCD stackup Plan- ner and iCD PDn Planner software. To read past columns, or to contact olney, click here. beyond design SPLIT PLAnES In MULTILAyER PCBS continues