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10 SMT Magazine • April 2015 is often markedly cooler than a smaller compo- nent, such as a passive resistor or capacitor. This paper will discuss an experiment that studied the effect of reflow profiling on the electrical reliability of no-clean flux residues that can be measured using IPC J-STD-004 [1] surface insula- tion resistance (SIR) testing. Both a halogen-free (ROL0) and a halogen-containing (ROL1) Pb- free no-clean solder paste, exposed to various reflow profiles, were used in this study. Prior work had exposed the impact on SIR val- ues of entrapping a solder paste flux residue under a component body or RF shield. What was un- clear in that work is the impact of the reflow pro- file. Invariably, flux underneath a device does not get exposed to the same heat that an exposed flux does. So performing an experiment that focused solely on the effect of heating seemed pertinent. Experimental In this experiment, a total of eight reflow profiles were used for each solder paste; one paste being ROL0 and the other being ROL1. Both solder pastes used are standard commer- cially available products. All boards were re- flowed in a standard convection belt furnace type reflow oven with an air environment. The reflow profiles consisted of four different peak temperatures: 225°C, 235°C, 245°C and 255°C. ElECTriCal rEliaBiliTy OF NO-ClEaN SOlDEr paSTE Flux rESiDuES continues FeAture Figure 1: IPC-B-24 SIR test coupon with thermo- couples attached. figure 2: 225°c ramp to peak reflow profile.

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