PCB007 Magazine

PCB-May2015

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8 The PCB Magazine • May 2015 Introduction Perhaps one of the three most fundamen- tal aspects of printed circuit fabrication is the metallization and electroplating of through- hole vias and blind via interconnections. Ide- ally, one should also include fine-line imaging of increasingly smaller feature sizes and via for- mation, whether by mechanical or laser meth- ods. Indeed, the foundation of technology roadmaps should, at the very least, encompass a discussion of line widths and spaces, PTH and blind via aspect ratios, and a metric that defines acceptability of plating uniformity and throwing power. These same parameters have been used for nearly four decades to quickly by Michael Carano RBP CHeMiCal TeCHnoloGy Optimization of Acid Copper Electrodeposition Processes for High-Throwing Power DC Plating quantify the capability of a fabricator to prof- itably produce traditional boards. The ability to image conductor lines, and perhaps even more important, the insulating airspace be- tween them, is considered a key characteristic. With surface mount components, a dramatic decrease in plated via hole diameter require- ments occurred, and as a result, via holes have become simple vertical interconnections. Now, under competition from laser drilling, both drill bit and machine technology have driven mechanical holes capability much smaller. In the most recent release of the IPC Tech- nology Roadmap, PTH and blind via diameters and aspect ratios have been defined as to the technology sector where the boards are used. In order to provide a list of key attributes (layer counts, board thickness, number and diam- eters of vias, etc.) for the PCB, emulators are FEaturE

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