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June 2015 • The PCB Design Magazine 9 On to the Designers Council Meeting Next, I fired up my trusty Hyundai rental car and headed north to Orange County for a Designers Council lunch-and-learn. (When did Hyundais become such good cars? I rented one once and I had to push it uphill. Not so with this rocket Elantra.) Though he's not a designer by trade, you'd never know it from talking to Scott McCurdy, longtime president of the Orange County Chap- ter of the Designers Council and director of sales and marketing for Freedom CAD. Yes, McCurdy has been a fabricator for decades, but he's also a big champion for PCB design and designers. As chapter prez, he's mastered the art of herding cats; the DC meeting on June 3 at Broadcom's UC Irvine campus drew over 100 people. The first speaker was Matt Isaacs, technical di- rector at Broadcom. He discussed a qualification vehicle that Broadcom had fabricated. His team sent the same PCB design to five different fabri- cators, without providing any special directions. His group then put the resulting boards through a series of electrical tests, and found that every single board was completely different. "We saw very little difference with TDR looking at just impedance. Trace impedance with TDR…everything looked pretty good," said Isaacs. "But once we got to the VNA, [vec- tor network analyzer], looking at attenuation vs. frequency, we really started to see a lot of surprising data. For some fabs, certain layers were great and other layers were problematic." But the Number 1 problem for all five fabri- cators was the via. Isaacs' presentation included information on tuning vias by using antipads and backdrilling. One of the bullet points read, "There's no such thing as a good, partially back- drilled via." Isaacs found that basic PCBA con- struction works fine up to 28 Gbps and beyond. Next up was Julie Ellis, a field application engineer for TTM Technologies and 30-year in- dustry veteran. Her presentation also focused on vias, and how tough it is to get consistent plating into a blind via, or in a 6 mil via that's three times the thickness of a human hair. Ellis explained how reverse pulse plating works, and why that's often the best choice for achieving uniform coverage in vias. Ellis noted that TTM won't use mechanical drills for any pitch below .8 mils, so they use YAG or CO 2 lasers instead, or a combination of the two: YAG can pierce copper and dielectric, while CO 2 bounces off copper. Ellis explained that any vias smaller than .8 mils generally can't be built in China. Ellis also discussed a TTM technology used for fanning out from large BGAs: next-gener- ation SMV, or stacked microvias. These BGAs with thousands of pins were almost impossible to fanout, but with SMV, each pin in the BGA has its own layer, connected by microvia. It looks like a nightmare to fabricate, though. Another big thank you to Scott McCurdy for inviting me to his OC lunch-and-learn. He said he used to get five attendees; now he has about 100 most of the time. I'd be happy to come back some day! PCBDESIGN Andy Shaughnessy is managing editor of The PCB Design Magazine. he has been covering PCB design for 15 years. he can be reached by clicking here. the shaughnessy report ALL ABOuT THAT VIA? continues Julie Ellis, TTM Technologies (left) and Matt Isaacs, Broadcom (right) speak at the Orange County Designers Council meeting.