Design007 Magazine

PCBD-July2015

Issue link: http://iconnect007.uberflip.com/i/539281

Contents of this Issue

Navigation

Page 37 of 67

38 The PCB Design Magazine • July 2015 In Part 1 of the Stackup Planner series, I looked at how the stackup is built, the mate- rials used in construction and the lamination process. And I set out some basic rules to fol- low for high-speed design. It is important keep return paths, crosstalk and EMI in mind during the design process. Part 2 follows on from this with definitions of basic stackups starting with four and six layers. Of course this methodology can be used for higher layer count boards—36, 72 layers and beyond. Four-Layer Stackup A four-layer board is probably not the most practical configuration for high-speed design. Although it does have the advantage, over double sided boards, of using planes for the distribution of power and ground and the planes also act as the return current path for signals. Microstrip traces tend to radiate emis - sions and this configuration should be avoid- ed in preference to embedding the critical sig- nals using a higher layer count configuration. On the other hand, if you intend mounting the four-layer board, completely shielded, in a metal box then this configuration may be acceptable. Since all (most) stackups are symmetrical, then it is best to just work on just the top half of the stackup to begin with—this halves the construction time. Stackups are generally sym- metrical, with even amounts of copper about the center, in order to prevent the board from warping during fabrication and during the re- flow process. If one half has more copper, then it will cool at a slower rate thus warping the board. The layer selection process is a follows: 1. With four layers, two planes are placed in the center of the substrate. One ounce (1.4 mil) copper is typical for plane layers. 2. Prepreg material separates the signal layers from the planes and this should be as thin as possible in order to achieve close coupling. 3. Solder mask is generally added to the outer layers. This will reduce the impedance by a few ohms. In Figure 1, the virtual materials yield a 54.44 ohm signal ended and 96.82 ohm differ- ential impedance. This is close enough (to 50 ohms). Now let's fine-tune this stackup by in- serting real dielectric materials and then adjust the variables to get the desired impedance. The ICD Stackup Planner's Dielectric Mate- rials Library contains over 16,700 commonly used core, prepreg and solder mask materials, arguably the most comprehensive list of mate- rial properties ever compiled. Using the exact materials that are stocked by your fabricator can increase accuracy by up to 5%. So before you start this process, it is best to consult your fab coulmn by Barry Olney in-CiRCuiT DeSiGn PTy LTD BEyOND DESIGN Stackup Planning, Part 2 Figure 1: The top half of the four-layer stackup using virtual materials.

Articles in this issue

Links on this page

Archives of this issue

view archives of Design007 Magazine - PCBD-July2015