SMT007 Magazine

SMT-Sept2015

Issue link: https://iconnect007.uberflip.com/i/564614

Contents of this Issue

Navigation

Page 71 of 119

72 SMT Magazine • September 2015 nation be used for predicting tin whisker self- mitigation. Introduction Tin whiskers can grow from pure tin sol- der terminations, device cases, and connector shells, and risk causing electrical short circuits (Figures 1 and 2) [1] . Tin whiskers have been shown to be the root cause of the total loss of entire satellites, shutdown of nuclear power plants, and failure of consumer electronics such as digital watches. tin Whisker risk mitigation techniques Accepting tin whisker risk mitigation is an alternative to rejecting parts and assemblies with pure tin [2] . Risk mitigation assumes that some level of risk must be accepted [3] . Examples of tin whisker risk mitigation techniques in- clude removing the pure tin by plating or sol- der dipping, covering the pure tin by coating or potting, or performing a tin whisker growth project on the parts in question [2, 4, 5] . mitigation by soldering with snpb solder This is a self-mitigation or lead-poisoning technique that uses the tin/lead soldering pro- cess to add lead to the solder joint and elimi- nate the risk of tin whiskers. This technique has the risk of insufficient solder flow across com- ponent lead surfaces. Qualification for self-mitigation Qualification of surface mount package styles for self-mitigation is outlined in the Rev A GEIA-STD-0005-2 [6] as follows: "Tin or tin alloy surfaces and soldered areas shall be evaluated for >3% Pb content using XRF, consistent with SAE Standard JESD213 [7] , SEM EDS, consistent with MIL-STD-1580, Requirement 9 [8] , or other methods approved by the customer. Mi- cro-sectioning shall be performed to ensure that there is adequate consumption of the Pb-free tin into the solder. The qualification shall take into account variability in the solder process controls." self-mitigation Qualification studies Published results for limited numbers of package styles from Raytheon Goleta, Stevens et al [9] , and Rockwell Collins (D. Hillman) [10] predicted specific package styles (SOICs, chip resistors, and RF transistors) would self-miti- gate if the solder termination height from sol- der pad to the lead egress were < 0.030 inches, or about half the total package height, under optimized soldering conditions. This self-mit- igation qualification project investigated mul- tiple surface mount package styles, meeting the qualification requirements of the Rev A of GEIA STD-0005-2 [6] , with results showing rules based on more than just solder termination height are needed to predict self-mitigation. ArtiCle tIN WHIsKer seLF-mItIGAtION IN surFACe mOuNt COmpONeNts continues figure 1: Tin whisker on partially disassembled connector contacts. figure 2: close-up of tin whiskers shorting between contacts.

Articles in this issue

Archives of this issue

view archives of SMT007 Magazine - SMT-Sept2015