Design007 Magazine

PCBD-Jan2016

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40 The PCB Design Magazine • January 2016 only on the impedance plot, but also on the step response plot in Figure 3, we just need to switch the horizontal scale to logarithmic. From the step response, we can apply the reverse pulse technique and get the absolute worst-case transient noise, 391 mVpp, which is shown in Figure 4. The step response has a peak deviation of 29.6 mV, which together with the 3mV DC steady state response on the 3 mOhm DC resistance creates a 56.2 mVpp worst-case quiet power HoW To DESIgN A PDN FoR THE WoRST-CASE SCENARIo Figure 2: Impedance magnitude and phase from the circuit shown in Figure 1. note that both axes are logarithmic; in particular, the frequency scale is logarithmic to clearly show the resonance peaks sepa- rated by three orders of magnitude. Figure 3: Simulated step response of the circuit shown in Figure 1. Vertical axis is linear, the horizontal axis is logarithmic.

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