SMT007 Magazine

SMT-Feb2016

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34 SMT Magazine • February 2016 paste for the SMDs. This stencil is normally an electroformed 75 µm thick stencil for the sol- der paste apertures but has a relief step pocket 50µm thick on the contact side of the stencil in the area where flux was printed with the first stencil. This relief pocket provides sufficient clearance to avoid contact with the previously printed flux. It is also possible to print the solder paste first for the SMDs and the flux second. In this case, the first print stencil is typically a 50 µm thick electroform stencil for printing solder paste. The second print stencil is typically a 3D electroform stencil 150 µm thick with a 75 µm relief pocket to avoid contact with solder paste previously printed. One of the primary applications driving mixed technology packages is RFICs for wire- less applications such as mobile phones, wire- less infrastructure and wireless LAN. Typically, these devices have multiple flip chips, 0201 as well as 01005 chip components mounted on a small substrate which are packaged as a MCM, QFN, or DFN. As these packages become small- er, the FC and SMD are packed closer together. This presents technical challenges to the second print stencil, reducing the distance of the relief pocket to the paste or flux aperture. A new electroform process has been devel- oped that allows the spacing between relief pocket and aperture to be reduced to 40 µm. Figure 1 shows solder paste aperture for 01005 and relief pocket for flux. Figure 2 is a cross sec- tion showing 40 µm spacing between solder paste aperture and the relief pocket. SMT William Coleman is the vice presi- dent of technology at photo Stencil LLC. He is also a member of the SMT Magazine Editorial Advisory Board. Figure 2: cross section showing 40 µm spacing between solder paste aperture and the relief pocket. " One of the primary applica- tions driving mixed technology packages is RFICs for wireless applications such as mobile phones, wireless infrastructure and wireless LAN. " tWo-PriNt steNcil solutioNs For FliP cHiP/smt assemblY

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