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SMT-Mar2016

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34 SMT Magazine • March 2016 ber level versus requiring a significant revision to the board in question. First let's conquer the simple. For analog, RF, and lower technology digital boards, the approach is the simplest. Typically, straightforward flying probe test is the answer. The better EMS companies use a du- al-sided flying probe tester as shown in Figure 1. For this test approach, the test engineer simply asks that the vias not be covered with solder- mask, which can be a simple change handled at the CAM/Gerber level. Because flying probe testers can generally test a via with a 20 mil pad and a 10 mil hole, the holes do not need to be plated shut. Depending on the test coverage, the test department may recommend adding vias, assuming the design can handle it from an electrical perspective. Many CAD systems can add the via as a test point. One via per net provides 100% access, in- creasing the odds for very good actual test cov- erage. If vias are being avoided, as in sensitive analogs or RF technology boards, the tester may be able to test at the solder joint. The challenge with this approach is many sensitive analogs or an RF design can minimize the size of the pad, by W. Scott Fillebrown lIBrA INDUSTrIES INC. With most high-volume printed circuit as- sembly being sent outside the United States, we have a unique challenge for testing the lower volume/high turnover assemblies domestically. However, with a little planning and the right contract manufacturer (CM), test does not need to be an issue. Here is the challenge: The U.S. market main- ly is comprised of higher technology/lower pro- duction quantity assemblies. In many cases, in- circuit bed of nails testing is not an option due to development time and cost, not to mention the difficulty associated with finding a place for 30–40 mil test points. These same test points also create significant EMI concerns for most electrical engineers. The challenge is to find a way to thoroughly test a fully populated circuit in a timely, cost-effective way, without compro- mising signal integrity. Depending on the technology, the chal- lenge can be as simple as making minor design changes, which actually can happen at the Ger- Design for Test in the U.S. Market fEaturE

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