PCB007 Magazine

PCB-June2016

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14 The PCB Magazine • June 2016 parts that were also made in that facility. The advantage of the +PR was that it was extreme- ly resistant to the ferric chloride etchant and it could be used in 'progressive' exposure and etching. That is, the metals could be etched, then new artwork would expose additional metal that could be etched, etc. In this man- ner, 3D features could be etched in the various metals. (Technical details on this type of photo- resist, the electrodeposition process, machinery and applications can be found in the technical papers in the Reference section, 2–5.) Getting Over the Density Wall When it comes to getting higher routing density, you only have five degrees of freedom: • Smaller traces • Traces closer together (spaces) • Smaller vias (down to microvias) • Smaller annular ring for the vias • Higher layout efficiency when routing (definition in column #10-DFM/A) [6] I'm talking about 'routing density' on a sin- gle layer; more signal layers will result in more total routing distance on a board. The equation for routing density is: (Eq. 1) Where: N = number of traces in the channel G = routing channel dimension Dv = via diameter (FHS) Da = via's annular ring Cs = conductor spacing Cw = conductor width If you reduce some of the variables in this equation (Eq.1), then the resulting routing den- sity will go up by the percent indicated in Table 1. Figure 3 shows the opportunity for maximum density routing using 0.004 inch traces with 0.004 inch spacing and landless vias. The largest effect on density is reducing the trace width, but this can come with electrical issues; the second best way to increase density is to reduce the via's annular ring (AR), but a very small AR will signifi - AGAINST THE DENSITY WALL: LANDLESS VIAS MIGHT BE THE ANSWER Figure 2: Typical landless vias on a Japanese multilayer from ~1985. Figure 1: Reliability data from NEC on their landless via fabrication process [1] .

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