Issue link: https://iconnect007.uberflip.com/i/688506
28 The PCB Magazine • June 2016 by Tobias Sponholz, Lars-Eric Pribyl, Frank Brüning, and Robin Taylor ATOTECH DEUTSCHLAND GMBH Originally presented at IPC APEX EXPO 2016 and published in the proceedings. Introduction The one constant in electronics manufactur- ing is change. Moore's Law, which successfully predicted a rate of change at which transistor counts doubled on integrated circuits (ICs) at lower cost for decades, is ceding to be an ap- propriate prediction tool. Increasing techni- cal and economic requirements, deriving from the semiconductor environment, are cascaded down to the printed circuit and in particular to the IC substrate manufacturers. This is both a challenge and an opportunity for IC substrate manufacturers, when dealing with the demands of the packaging market. As a consequence, miniaturization of lines and spaces (L/S) down to 5/5 µm and even below to 2/2 µm in conjunction with smaller blind micro vias (BMV) is required to meet the very challenging wiring densities for new technologies. However, implications of the 'faster, smaller, and cheaper' mindset also affect high-end HDI printed circuit board manufacturers. The existing production infra - structure based on panel plating is not capa- ble of 20/20 µm L/S—as required by OEMs for high-end mobile devices. As a consequence of this, production technology needs to change to pattern plating. Miniaturization leads to increased require- ments for all process steps involved in the val- ue-added-chain. This paper discusses the corre- sponding challenges for metallization based on electroless copper processes. In order to mini- mize the effect of the differential etch process, which is one of the major factors determining surface feature resolution, the thickness of the deposited electroless copper layer on the surface of the substrate must be reduced. Moreover, the thickness at the sidewalls and bottom of the BMV must be improved to ensure excellent via filling performance. These contradicting re- New Opportunities for IC Substrates and HDI Manufacturing High-Throw Electroless Copper– FEATURE