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PCBD-June2016

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24 The PCB Design Magazine • June 2016 by Andy Shaughnessy David Ledger-Thomas is a PCB design en- gineer with Honeywell Aerospace. He's spent decades designing PCBs for a variety of applica- tions, including defense, aerospace, computers, and high-performance audio. I asked David to share some of his thoughts on designing high- tech boards with increasingly finer spaces, trac- es and pitch. Andy Shaughnessy: What are the tightest toler- ances you are currently designing? David Ledger-Thomas: Out of the gate, the as- sumption for "tight tolerances" is referring to trace and space width. That would be 4.5 mil trace width and 4.5 mil trace spacing. But to add for conversation, tightest tolerance may also reference how much trouble is the PCB fabrica- tor going to have with a particular design (i.e., layer count in a specified thickness, drill size aspect ratio, annular ring, cost, schedule, etc.) while still meeting customer requirements. The PCB design team must also take into account DESIGNING PCBs WITH TIGHTER TOLERANCES some design parameters such as mechanical/ electrical performance, manufacturability, reli- ability and schedule. So all these could be a part of the "tight tolerance" vocabulary. Shaughnessy: What are the most challenging is- sues designers face regarding fine spaces, traces, and pitch? Thomas: Signal integrity would weigh heavy on the application of fine spaces, traces and pitch. Reliability would also be a factor, as in, will the board perform over temperature with a very low mean time between failures (MTBF). And of course can the board be fabricated to re- quired specifications repeatedly and in a timely manner. If a fabricator had to manufacture 20 boards to get one good one, then that would be a poor performer for cost, time and reliability (even though the design was great in the PCB design tool). Shaughnessy: Does your PCB design tool handle tighter tolerances well? What about PCB design tools in general? FETAURE INTERVIEW

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