SMT007 Magazine

SMT-Nov2016

Issue link: http://iconnect007.uberflip.com/i/745476

Contents of this Issue

Navigation

Page 9 of 99

10 SMT Magazine • November 2016 tried using solder mask dams on the pad to pre- vent thieving with poor results. We also don't want to add more vias than necessary to meet the thermal target. In this case, more is not nec- essarily better as it may increase voiding at the thermal interface." He added that more vias in- crease the drill time at the PCB fabricator side, and may increase cost. Reliability is also an issue, per our survey. One respondent said that their QA department is concerned that tenting vias leaves contami- nants in vias, which can affect the long-term re- liability of the PCB assembly. He noted, though, that tenting vias help minimize solder prob- lems, so he always tents vias. Apart from tent- ing, via filling, mask covering and plating are also challenges when dealing with vias. This brings me to our topic for this month's issue of SMT Magazine, which aims to provide more information on the impact of vias in PCB assembly. For starters, we have W. Scott Fillebrown of Libra Industries writing about why vias are con- sidered the "unsung heroes" of a circuit board. He said vias designed properly complete a cir- cuit, while the opposite can cause reliability nightmares. Next, David Geiger, Anwar Mohammed and Jennifer Nguyen of Flex discuss a study they conducted regarding the impact of via and pad design on quad flat no-lead (QFN) assembly, specifically on voiding and protrusion. Their study finds out whether a small via prevents the solder to flow to the other side, how the via should be designed, and what via type will have less of a voiding issue. Patrick McGoff of Mentor Graphics mean- while looks at the problem of automotive elec- tronics reliability, and improving automotive electronics further by looking at the PCB. He enumerates the critical features of the PCB that you need to measure to assess reliability, in- cluding the type, size and number of layers of the PCB, the number and size of vias, microvia stackup, vias in pad, embedded devices, and as- pect ratio, to name a few. He also lists the elec- tronic component and padstack details to be used, and finally, the manufacturing process considerations when producing the boards. In his article, Yash Sutariya of Saturn Elec- tronics/Saturn Flex explains the results of his study on the impact of waiving PCB pre-baking prior to assembly. His study includes via integ- rity, via life impact, via failure, and overall reli- ability failures. Meanwhile, for her column this month, in- dustry expert Dr. Jennie S. Hwang of H-Technol- ogies Group focuses on crystal structure and de- fects—a conclusion to her series on the key pro- cesses likely engaged in tin whisker growth. THE IMPACT OF VIAS ON PCB ASSEMBLY

Articles in this issue

Archives of this issue

view archives of SMT007 Magazine - SMT-Nov2016