PCB007 Magazine

PCB-Nov2016

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November 2016 • The PCB Magazine 21 Landless Via Processes There are numerous patent applications about landless vias. All require laser sculpting of the via or pinpoint laser exposure for the imag- ing. None of these have ever entered production. The two that have been used in high-volume production are listed here, with two additional techniques that appear to be very practical. HP Process Learned from the Japanese The Japanese process for making landless vias is very simple, but anyone I talked to never figured it out until I explained the process. It is a true example of thinking outside the box: 1. Whatever your registration tolerances are, then reduce the artwork land opening size by that amount when using dry film photoresist. The dry film will now extend beyond the wall of the drilled hole. 2. Two things will happen with this arrange- ment: 1) the plating bath will be forced to throw into the hole thus improving the distribution; 2) There will be no land except where the trace enters the hole. 3. After stripping and etching, there will be landless vias with the trace dropping into the barrel of the PTH or blind via. 4. This process does not work for panel plating; that requires theuse of the next process like NEC. Positive Liquid Electrophoretic Photoresist As I reported, I first saw this process in Ja- pan in 1985 at NEC. They were using a positive electrophoretic photoresist from Nippon Paint, evolved from the electrophoretic paints used on automobiles. A similar photoresist was available in the USA and Europe by Shipley [2,3] . A more recent photoresist and process came from PPG Industries and is documented in a paper by Pa- tricia Goldman (at that time with PPG) and Tim Schmidt of Compunetics [4] . The positive- acting photoresists have many properties that can be very useful. The most useful is multiple exposure and developing, its resistance to plat- ing especially Ni-Au and etching, its fine-line resolution [down to 10 micron (0.4 mil)] and its insensitivity to dust and clean-room debris. The coating process is relative simple: • Clean panel • Coat for 60 to 90 sec at 60V~100V (voltage will determine finished thickness) • Rinse • Bake dry INNOVATIVE USE OF VIAS FOR DENSITY IMPROVEMENTS Figure 2: Typical landless vias on a Japanese multilayer from around 1985 [1] . Figure 3: Landless via supplemented with the same diameter as the trace width, in this case, 0.004" (0.1 mm). These are referred to as 'invisible vias.' (Source: HP Sunnyvale PC)

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