SMT007 Magazine

SMT-Dec2016

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December 2016 • SMT Magazine 77 BOUNDARY SCAN MEETS FUNCTIONAL TEST strategies. It clearly demonstrates that there is an excellent synergy between the structure test and the functional test, and they should never be considered as alternatives. Instead, the right way to unlock the full potential of this duo lies in combining them. Standardized Variety Although JTAG boundary scan has now been in existence for over 25 years as the IEEE1149.1 standard [1] , cyclical extensions such as IEEE1149.6 [2] and new releases [3] have contin- uously maintained it at the level of technolog- ical requirements, keeping it up-to-date. In the context of the topic under discussion, particu- lar attention should, however, be paid to some of the properties: • The standard was designed as a successor of the digital, static in-circuit tests, but it is difficult or impossible to use it to cover areas that go beyond this • JTAG boundary scan only defines digi- tal test points inside chips, which can be used both for structure tests and static functional tests • Because the inner circuit core is quasi- isolated, the basic separation between function and structure is achieved in an ingenious way • At the same time, the high quality of the diagnosis is also ensured, because the test vector generation can be highly automa- ted. Here, the process demonstrates an almost unbeatable level of efficiency • Fault coverage can be predicted in advance (i.e. designs can be optimized while they are still testable, before a physical prototype is built) • In the digital area, fault coverage is primarily restricted by the limited vector repetition rate. As a result, it cannot detect dynamic faults Boundary scan has established itself as a log- ical solution, primarily in complex chips such as processors, FPGA, DSP and ASIC. A singe boundary scan circuit can provide excellent ser- vices during testing [4] and is also a useful addi- tion as a process sensor [5] in conjunction with inspection technologies. The cluster test provides a method for using boundary scan as a functional test (Figure 2). There are many varieties of cluster tests. For more details, please see the literature [4] . External I/O modules can also be used (Fig- ure 3), besides such embedded applications. They can easily control the static functions of an entire circuit, using the native connectors or the test points on the UUT. If the board con- tains additional boundary scan circuits, it is of- ten possible to carry out deep structural tests of connectors or other partitions that cannot be scanned. The boundary scan principle remains the same throughout, as the external modules are essentially added to the natural circuit. Such a scenario can even be used to test an- alog functions, or clusters. However, this is con- tingent on the I/O modules being equipped with mixed-signal channels, as is the case, for exam- ple, with the CION-LX I/O module by Goepel electronic [6] . In summary, boundary scan innate- Figure 2: Functional cluster test per boundary scan. Figure 3: Functional test via external CION LX I/O module with mixed-signal channels.

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