Issue link: https://iconnect007.uberflip.com/i/773715
30 The PCB Design Magazine • January 2017 balance the amount of copper on a given layer, thus reducing the possibility of an unaccept- able level of bow and twist. The second is an unbalance of copper from layer to layer. This could have a detrimental ef- fect on overall board bow and twist. The third is the use of multiple surface fin- ishes. Downstream surface finishes could have an incompatibility with previously plated fin- ishes. They may cross contaminate subsequent plating baths. The result is that the fabricator will have to utilize several masking and plat- ing operations, which increase time and cost. I would recommend that if mixed surface finish- es are necessary, that the designer consult with his fabricator on mixing surface finishes. This also holds true for use of mixed dielectrics. Shaughnessy: What fab processes do you think designers should know more about? Most PCB designers tell me that they have never been to a board shop, or they haven't been to one for de- cades. Does that surprise you? Ferrari: I am not surprised that the majority of designers have never visited a board fabrica- tion or assembly facility. The board designer has never been given their duly earned respect. They must fully understand the fabrication and assembly processes and their limitations, test- ing in both areas, laminate materials, protec- tive coatings, repair and test strategies, compo- nent engineering, electrical characteristics and respective engineering, and new technologies. I could go on and on with what they should know. The sad part of it is that they are expected to know this purely by osmosis. Few companies actually allocate time for technical education. Few designers are allowed to go to major tech- nology conferences, or attend standards devel- opment committee meetings. It is at these con- ferences that the learning opportunity is great- est. They also provide a perfect opportunity to develop a knowledge based support network. There are quite a few designers that have joined IPC Designers Council chapters located throughout North America, Europe, Asia, and we must not forget the folks down under, in Australia. These chapters all run programs for designer education, plant tours, guest speakers, etc. Shaughnessy: Is there anything else you would like to add? Ferrari: Those who know me know that I can go on forever. However, I think I have said enough. Thank you for the opportunity to vent. Shaughnessy: Thank you, Gary. PCBDESIGN Researchers have dem- onstrated the high-perfor- mance potential of an ex- perimental transistor made of a semiconductor called beta gallium oxide, which could bring new ultra-effi- cient switches for applica- tions such as the power grid, military ships and aircraft. The semiconductor is promising for next-gen- eration "power electronics," or devices needed to control the flow of electrical energy in circuits. Compared to other semiconductors thought to be promising for the transistors, devices made from beta gallium oxide have a higher "breakdown voltage," or the voltage at which the device fails, said Professor Peide Ye of Purdue University. The team also developed a low-cost method using ad- hesive tape to peel off layers of the semiconductor from a single crystal. The "Scotch-tape" approach costs pennies and it can be used to cut films of the beta gallium oxide ma- terial into "nano-membranes," which can then be transferred to a conventional silicon disc and manufactured into devices, Ye said. Semiconductor Eyed for Next-Generation 'Power Electronics' IN DEEP: THE ART AND SCIENCE OF DFM WITH GARY FERRARI