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August 2017 • The PCB Magazine 55 that peeled off and some pads underwent mul- tiple temperature cycles (up to approximately 300°C) with no issues. The design of the board and photographs of the completed board oper- ating are shown in Figure 6. Multilayer PCB architectures can be built up by aligning and gluing additional layers of glass onto plated glass layers and repeating the meth- ods outline above. Figure 7 demonstrates drill- ing and plating of blind vias to build up multi- ple glass layers. A pattern with a 200 μm diam- eter pad with 50 μm diameter through-via was made in 50 μm glass using the company sys- tem operating at 1 MHz, 3-4 μJ with a feed rate of 1 m/s. The piece was then seeded and plated as described above. Optical glue was spin-coat- ed onto a second piece of glass such that the thickness of the glue was less than 5 μm, and this piece of glass was then affixed to the plat- ed piece. The pattern was aligned and blind vias drilled such that the glass was removed without damaging the copper pad underneath. Blind via drilling with the company system was carried out using parameters similar to those used for the through holes. Alternatively, the high reflectivity of cop- per and the high absorption cross-section of glass to mid-IR wavelengths makes the compa- ny's CO 2 -based microvia platform an ideal so- lution for blind via drilling in this application. 50 μm top diameter vias with 35 μm bottom di- ameter were drilled using the company system. For both blind via drilling methods the vias pre- pared were amendable toward forward transfer of copper and subsequent plating, as shown in Figure 7. Comparison with Standard Practices Besides describing a unique method for creating PCBs and IC packaging with few of the current lithographic and wet process con- straints, the process described in this paper rep- resents a facile method for the introduction of glass dielectric materials into traditional PCB fabrication lines. As an example, a multilayer board with a high-frequency glass layer could be built up by first applying the etching, seed- ing, and plating techniques described herein to a thin glass substrate, followed by lamination of additional glass or more traditional dielectrics onto the glass layer. The laminated layers would then be etched, drilled, and plated using typi- cal processes. Furthermore, the method can be modified to prepare embedded components in all-glass structures. An important point of comparison between laser seeding for electroless plating and typical PCB fabrication techniques is that, unlike typ- ical processes, the laser seeding for electroless plating process requires no photolithography Figure 7: Blind vias and multilayer stack using 50 μm glass. The dashed lines indicate the edges of the glass pieces and middle glue layer. In both A and B, the bottom 50 μm glass was machined using a company system to prepare an embedded pad 20 μm deep and 200 μm in diameter. A through-via was then drilled from the bottom of the pad, and the piece seeded and plated using laser forward transfer followed by electroless plating. After gluing on the top 50 μm glass, blind vias were drilled using either the company 1 system (panel A), or the company's CO 2 -based microvia platform (panel B). LASER PATTERNING AND METALLIZATION TO REDUCE PROCESS STEPS FOR PCB MANUFACTURING