SMT Magazine

SMT-Sept2017

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38 SMT Magazine • September 2017 Nevertheless, as the 01005 components exist, the challenge is set. While the component size is shrinking and integration as well as the packing density are rising, on the other hand the PCB size is growing. Mainly driven by telecommunication and internet data transmission (cloud computing, IOT), the processing power of today's computer centers is increasing rapidly. And in the same way parallel processing computer boards are growing in size. One challenge that remains is, how to homogeneously preheat a fully populated 24" x 48" multilayer PCB during rework? Other topics like tracing and documenting the individual board treatment in the rework area seem to become a must in times of soaring electronic production and as repair processes have become an acknowledged part of electronic assembly. Out of the above mentioned topics, which basically describe a roadmap for rework capabilities until 2021, three subjects will be introduced subsequently. Other than issues that will be important for future repair and rework feasibility they have already reached practical necessity since a while ago and thus need to be fully implemented or improved in today's rework systems. Voidless Treatment During a Rework Process In the assembly of bottom terminated components (BTC) the formation of voids has become a serious problem in many applications. A definition for a void is given in the context of soldering defects as: […] then solder will quickly fill the opening of the fitting, trapping some flux inside the joint. This bubble of trapped flux is the void; […] the joint, preventing solder from occupying that space. An area inside a soldered joint where solder is unable to completely fill the fittings' cup, because flux has become sealed inside [1] . And in SMT, only one of the possible effects is explained as: […] The reliability of solder joints becomes more of a concern, as less and less solder is allowed for each joint. Voiding is a fault commonly associated with solder joints, especially when reflowing a solder paste in the SMT application. The presence of voids can deteriorate the joint strength and eventually lead to joint failure [2] . The following impacts of void formation inside a solder joint have been reported: • reduced thermal transfer from component to the PCB with risk of overheating the component • reduced mechanical strength of a solder joint • possibility of spontaneous out gassing— creation of solder splashes • impact to the ampacity of a solder joint— connection may overheat because of higher electrical resistance • impact on the signal transmission—in high frequency applications voids may dampen the signals Especially in power electronics, the formation of voids in the thermal pad (e.g., QFN packages) is currently an increasing problem. The necessary transfer of energy from the component into the PCB for cooling purposes might be disabled. The components lifetime will be drastically reduced. Besides other methods like using low-voiding solder pastes, optimizing the reflow profile and applying the correct amount of solder paste with optimized stencils, a void reduction treatment of the entire assembly while the solder is in its liquid phase is an option to choose. So the question is, how is it possible to implement a void treatment technology into an open environment of a rework machine? The vacuum technology known from reflow ovens is not an option. The technique used is based on a sinusoidal actuation of the PCB substrate (Figure 1). Primarily the PCB is stimulated by a longitudinal wave with an amplitude of less than 10 µm on the PCB level. During this sinusoidal actuation of the PCB in a defined frequency range, the self-resonances of this area are stimulated regardless of the PCB layout and population. When the PCB is in sweep motion, the component remains in its location and the BTC AND SMT REWORK CHALLENGES

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