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12 The PCB Magazine • October 2017 Editor's note: We are pleased to introduce our newest column, which will be contributed each month by a team member from Elmatica. Knowledge and experience are the two key elements when planning a PCB. Today's PCB designers must have far more knowledge and understanding of the PCB production process than in the past. This is especially important when they plan and how they plan the stack- up, via span, routing and power distribution. This article will focus on multilayer boards since these are the types of PCBs where we truly see the importance of planning in the day-to- day PCB life. On a double-sided board, you can of course use one layer as a ground plane, but critical traces are not easy to handle. As a designer, you know your needs when it comes to signal integrity, electromagnetic in- terference (EMI) design and impedance require- ments. The factors involved are: • Number of layers • Number of power and ground planes used • Sequence of layers • Space between the layers To continue, we can say that: • Signal layers carrying critical signals, should always be adjacent to a plane • Power and ground planes should be as close as possible for best capacitance • Power and ground planes can use other material with a higher Dk, for best possible capacitance • High-speed signals should be routed on innerlayers located between planes for best possible shielding Multiple groundings will lower the reference plane's impedance, and reduce the common mode radiation from the high-speed signals. The lowest layer-count you need to achieve all of this is probably an 8-layer board (Figure 1). However, these points can be very challeng- ing. There might be a maximum thickness of the PCB that cannot be ignored; many plane layers will limit the number of signal layers. It can be difficult to get the wanted signal imped- ances, regarding distance between layers, track widths and gaps between tracks. Signal integrity addresses the degradation of signal quality to the point where an error oc- curs. EMI focuses on the corresponding specifi- cations, test requirements and interference be- tween nearby equipment. For signal integrity, the key factor is to keep noise levels significant- ly below signal levels. Our noise margins are typical in the millivolt range for digital circuits, Planning a PCB: Signal Integrity and Controlled Impedance Considerations by John (Josse) Steinar Johnsen ELMATICA FEATURE COLUMN: THE PCB NORSEMEN Figure 1: Sample of an 8-layer stack-up.