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PCB-Oct2017

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32 The PCB Magazine • October 2017 by Scott Jewler SILICON VALLEY X-RAY Murphy's Law It happens again. A new backbone router/ switch build or a line card upgrade is approach- ing completion when something goes wrong. The system won't operate at the targeted data rate. Deadlines are looming and the root cause of the problem is buried somewhere in a big rack of electronic components. The integrated circuits were all speed tested prior to printed cir- cuit board assembly. There must be a problem in the system assembly, but where? For some time, control of printed circuit board manufacturing to specification has relied primarily on coupon tests. These are time-con- suming and often poorly represent the live por- tion of a panel, much less a population of pan- els. Modifications to designs, variations in line and space widths, and misalignment of layers can occur without the supplier being aware of the impact these changes have on the system's performance. Electrical test methodologies for bare boards are difficult to maintain, expensive, and provide limited information. Engineers are left to commit large amounts of money to board builds and cloud server manufacturing and hope the PCBs perform per design. The challenge is getting harder As the industry moves rapidly to full deploy- ment of 28 Gbps backplanes, many cloud hard- ware and PCB manufacturers are just beginning to regain confidence that what they build will work as intended. But 56 Gbps backplanes are just around the corner, or already in the drive- way for some companies. And line cards are not far behind. These faster data rates require even tighter design compliance and PCB pro- cess control. Certainly, much of this battle will be fought on the design side. Single layer rout- ing, sacrificial vias, and other techniques can mask PCB process variation. But is this the most desirable or cost-effective solution? The time is right for a new generation of metrol- ogy tools that will enable PCB manufacturers to build better products and for network de- signers to unleash the performance of their products without worrying about variances in as-built boards. The Back-Drill Dilemma Via stub length for high speed nets has been an industry concern for some time. Back-drill- ing to shorten the length of the via stub extend- ing beyond the internal signal layer is a rela- tively cheap and effective solution and has been FEATURE

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