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34 The PCB Magazine • October 2017 widely deployed for nets up to 28 Gbps. Stubs can typically be terminated within 12 mils of the target signal layer pad, using cross-section- ing of test coupons to check a few of the result- ing stub lengths after back-drill. However, some manufacturers are reporting the need to control via stubs to six mils max- imum for 56 Gbps nets. Are backplanes being shipped today able to operate at these higher speeds? Net-by-net electrical testing using time- domain reflectometry (TDR) provides some lev- el of compliance testing but is it sufficient or practical? Figure 1 shows a cross-section view of a typical back-drilled via stub. While back-drill accuracy can be measured in this way, it is cer- tainly insufficient to meet these emerging re- quirements for precision. Other Challenges While stub lengths are a major culprit in the failure of high speed PCBs, they are not the only problem. Stub drilling can be misaligned result- ing in slivers in the via. Coupon tests in the cor- ner of a board are unlikely to provide any use- ful information about this kind of defect. Even with good stub length control, other things can go wrong. The as-built net impedance may just not match the design value. Has the design been modified for manufacturability? Is the variation in line width and space greater than intended? Countless hours of engineering time and weeks and months of new product launch- es have been lost searching for these kinds of variations. And this challenge will only increase data rates are accelerated. What's next? A look into other parts of the electronics ecosystem illuminates the direction that board making must go to meet the needs of the most demanding customers. The semiconductor in- dustry faced similar problems some time ago. Existing line monitors and controls failed to de- tect variation that led to device failures. KLA and other manufacturers introduced new defect de- tection and metrology tools. These tools didn't go into a measurement lab outside of the man- ufacturing area, they went directly into the line and were integrated into the process routing. By integrating real-time metrology into manufac- turing, semiconductor makers have been able to pack more and more circuitry into the same space while increasing operating speeds and re- duction power consumption. Metrology in PCB Manufacturing Even if net-by-net electrical testing was more cost-effective, at best it is a screening tool to catch non-compliant boards before they are populated with integrated circuits. Drill surface detection helps but as board layers increase, variation in the position of signal layers in the full board stack become greater and greater. The structure of PCBs and the measure- ments that are required to drive improved pro- cess control clearly point towards a transmis- sive metrology solution that can look through a board stack and detect non-compliant stub lengths or slivers from misalignment. But what about accurate pre-mapping of actual signal lay- er position across the entire area of a high-speed board? Would not this information allow for significantly more accurate back-drilling? High Speed X-ray Metrology X-ray tools have been used in PCB assem- bly for a long time. These systems are extremely fast but do not provide sufficient resolution to drive the improvements described above. High resolution X-ray systems are being installed by some PCB manufacturers for failure analysis, PCB SIGNAL INTEGRITY OPTIMIZATION USING X-RAY METROLOGY Figure 1: A back-drilled via view after destructive cross sectioning.

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