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16 The PCB Design Magazine • October 2017 SIGNAL INTEGRITY: THE EXPERTS WEIGH IN per weight? Where will the impedances reside? What are the thresholds in tolerances (e.g., 100 ohms, 120 ohms, 75 ohms)? And what are the intolerances associated with it (2%, 5%, 10%, etc.)? At a stage where there has been no layout done and no actual artwork exists, it's difficult from a fabrication side to crawl into the cus- tomer's head and picture what it is he's trying to accomplish. "But if you're dealing with a fabricator that has not dealt with CPWGs (coplanar wave- guides) properly, they'll come back and say, 'Cosmetically, we want to route this thing out and don't want to see any burring, so we're go- ing to hack back that launch pipe three or four thousandths,' which is doing a huge detriment to you as the end user. Obviously, in a copla- nar waveguide, the launch needs to reside right at the part edge, and the end-user is well aware that the exposed copper there is really what you want to see. You really want to see it actually meeting with the Z-axis and you don't want to trim it back in any way. "Even material manufacturers will play games with you from time to time. I remem- ber when we had a situation where one of our material manufacturers was sending us very consistent material up until a point and then all of a sudden we got a mismatch in all of our numbers. All of our impedances were off, and it was all linear in one direction. We started do- ing some cross-sections, and we discovered that the 106, the 1080, 2113s, 2116s, 7628s of the world were all approxi- mately 1 mil thicker than what we were previously predicting. "Well, guess what? They made a change in their manu- facturing process from Shen- zhen to Guangdong and in the process, they went from a cure process that went from air dry- ing cure to a heat drying cure, which resulted in a slightly different dielectric thickness. That was a problem for us, because they were sending it from two sources. We were get- ting prepreg materials and core materials from both Shenzhen and Guangdong, and how could I possibly be able to predict im- pedances for a customer when I couldn't even predict the dielectric impedances of the pre- pregs that were being used? That's something that happens from time to time, and something you need to be aware of." Barry Matties asked if a cutting-edge high- speed design would face many specific challeng- es downstream during the fabrication process. "Oh, of course," Thompson replied. "All the things that these guys were just talking about: etching and plating, and coming up with tech- niques to actually minimize any loss off now that we're having to deal with a class 3 and AS9102 world. So, a lot of jobs that have things like blind, buried or epoxy-filled vias will re- quire an additional wrap plate. That additional wrap plate means that I'm going to dig into your available space just that much more. Will that affect your impedances? Absolutely. That additional metallization, that additional plat- ing, over the top of the trace for the wrap will indeed affect your impedances and it is definite- ly something you have to be aware of." Signal Integrity Tips "OK, guys," said Steinberger. "I've been lis- tening to this discussion of impedance, and I understand what you're saying, and thinking about it from my old microwave days. Geez, if I could get a VSWR (voltage standing wave ratio) that was better than 1.2, I thought I was starting to do pretty good. That's a 20 Db return loss, and it meant I got my impedance within 20%, and by the time I was getting down to a 1.05 VSWR, meaning 5% imped- ance, I thought I was pretty well there. When I think about the kinds of designs that I've been involved in, which is admit- tedly a small subset of the types of designs you get in- volved in, the vias and the im- pedance discontinuity of the vias become way more impor- Mike Steinberger