PCB007 Magazine

PCB-Nov2017

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November 2017 • The PCB Magazine 15 35 YEARS OF HDI FABRICATION PROCESSES AND OBSTACLES FOR IMPLEMENTATION ing, SMT assembly and printed wiring boards. Like the triangle in the figure, these three vital chains of the HDI VDC are linked. This makes the chart an ideal technique to analyze packag- ing, as it captures the three elements of inter- connection: • Assembly complexity: A measure of the difficulty to assemble surface mounted components; measures in parts per square inch and leads per square inch • Component packaging: The degree of sophistication of a component, measured by its average leads (I/Os) per part • Printed wiring board density: The amount of density (or complexity) of a printed circuit as measured by the average length of traces per square inch of that board, including all signal layers; the metric is inches per square inch When the chart is used to analyze surface mount assemblies, three major zones show up on the packaging chart, which is why I call it a map. The first is products with a high content of discreet components. Typical products are cam - corders, pagers and cellu- lar telephones. They have the highest assembly com- plexity, up to 300−400 leads per square inch (47 leads per square centime- ter). The second group is products with a high de- gree of digital components and some mixed discretes. Notebook computers, desk tops, instruments, medi- cal equipment and tele- com routers are examples. The last group has a high- ly integrated use of ICs. PCMCIA, flash memory, MCMs and other modules are typical of this group. This group has the high- est PWB wiring density of over 160 inches per square inch (25 centimeters per square centimeter). Figure 3 loosely shows the three regions. By charting products of a type over time, an analysis will show how the packaging technol- ogy is changing, its rate of change and the di- rection of those changes. This is the exercise in road-mapping. But now, the exercise will have some data behind it. A second valuable feature of the map is the area I call the "Region of Advanced Technolo- gies." This is where calculations and data have shown that it is necessary to have an HDI struc- ture. So, this is the barrier or wall of HDI. Cross this and it now becomes cost-effective to use HDI. Move too far and it becomes a necessity. To create the packaging map, an assembly is measured for its size, number of components and the leads those components have. The area is the laminate, not the surface area. The com- ponents include both sides of an assembly as well as edge fingers or contacts. By the simple division of leads by parts and parts by area of the assembly, the X- and Y-axes are known. By plotting the components per square inch (or components per square centimeter) against av- Figure 3: The Packaging Technology Map for printed circuits, created by Toshiba.

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